{"year":"2017","publisher":"Springer","date_created":"2018-12-11T11:48:16Z","user_id":"c635000d-4b10-11ee-a964-aac5a93f6ac1","volume":51,"publist_id":"6924","oa_version":"None","intvolume":"        51","status":"public","isi":1,"quality_controlled":"1","title":"Preface of the special issue in memoriam Helmut Veith","date_updated":"2023-09-27T12:29:29Z","article_processing_charge":"No","month":"11","external_id":{"isi":["000415615600001"]},"day":"14","author":[{"full_name":"Gottlob, Georg","last_name":"Gottlob","first_name":"Georg"},{"full_name":"Henzinger, Thomas A","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","first_name":"Thomas A","last_name":"Henzinger","orcid":"0000−0002−2985−7724"},{"first_name":"Georg","last_name":"Weißenbacher","full_name":"Weißenbacher, Georg"}],"publication":"Formal Methods in System Design","page":"267 - 269","doi":"10.1007/s10703-017-0307-6","type":"journal_article","abstract":[{"lang":"eng","text":"This special issue of the Journal on Formal Methods in System Design is dedicated to Prof. Helmut Veith, who unexpectedly passed away in March 2016. Helmut Veith was a brilliant researcher, inspiring collaborator, passionate mentor, generous friend, and valued member of the formal methods community. Helmut was not only known for his numerous and influential contributions in the field of automated verification (most prominently his work on Counterexample-Guided Abstraction Refinement [1,2]), but also for his untiring and passionate efforts for the logic community: he co-organized the Vienna Summer of Logic (an event comprising twelve conferences and numerous workshops which attracted thousands of researchers from all over the world), he initiated the Vienna Center for Logic and Algorithms (which promotes international collaboration on logic and algorithms and organizes outreach events such as the LogicLounge), and he coordinated the Doctoral Program on Logical Methods in Computer Science at TU Wien (currently educating more than 40 doctoral students) and a National Research Network on Rigorous Systems Engineering (uniting fifteen researchers in Austria to address the challenge of building reliable and safe computer\r\nsystems). With his enthusiasm and commitment, Helmut completely reshaped the Austrian research landscape in the field of logic and verification in his few years as a full professor at TU Wien."}],"_id":"743","language":[{"iso":"eng"}],"department":[{"_id":"ToHe"}],"issue":"2","date_published":"2017-11-14T00:00:00Z","publication_status":"published","citation":{"short":"G. Gottlob, T.A. Henzinger, G. Weißenbacher, Formal Methods in System Design 51 (2017) 267–269.","chicago":"Gottlob, Georg, Thomas A Henzinger, and Georg Weißenbacher. “Preface of the Special Issue in Memoriam Helmut Veith.” <i>Formal Methods in System Design</i>. Springer, 2017. <a href=\"https://doi.org/10.1007/s10703-017-0307-6\">https://doi.org/10.1007/s10703-017-0307-6</a>.","apa":"Gottlob, G., Henzinger, T. A., &#38; Weißenbacher, G. (2017). Preface of the special issue in memoriam Helmut Veith. <i>Formal Methods in System Design</i>. Springer. <a href=\"https://doi.org/10.1007/s10703-017-0307-6\">https://doi.org/10.1007/s10703-017-0307-6</a>","ista":"Gottlob G, Henzinger TA, Weißenbacher G. 2017. Preface of the special issue in memoriam Helmut Veith. Formal Methods in System Design. 51(2), 267–269.","ama":"Gottlob G, Henzinger TA, Weißenbacher G. Preface of the special issue in memoriam Helmut Veith. <i>Formal Methods in System Design</i>. 2017;51(2):267-269. doi:<a href=\"https://doi.org/10.1007/s10703-017-0307-6\">10.1007/s10703-017-0307-6</a>","ieee":"G. Gottlob, T. A. Henzinger, and G. Weißenbacher, “Preface of the special issue in memoriam Helmut Veith,” <i>Formal Methods in System Design</i>, vol. 51, no. 2. Springer, pp. 267–269, 2017.","mla":"Gottlob, Georg, et al. “Preface of the Special Issue in Memoriam Helmut Veith.” <i>Formal Methods in System Design</i>, vol. 51, no. 2, Springer, 2017, pp. 267–69, doi:<a href=\"https://doi.org/10.1007/s10703-017-0307-6\">10.1007/s10703-017-0307-6</a>."}}