{"month":"08","date_created":"2020-01-05T23:00:48Z","citation":{"ama":"Ferrere T, Maler O, Nickovic D. Mixed-time signal temporal logic. In: 17th International Conference on Formal Modeling and Analysis of Timed Systems. Vol 11750. Springer Nature; 2019:59-75. doi:10.1007/978-3-030-29662-9_4","mla":"Ferrere, Thomas, et al. “Mixed-Time Signal Temporal Logic.” 17th International Conference on Formal Modeling and Analysis of Timed Systems, vol. 11750, Springer Nature, 2019, pp. 59–75, doi:10.1007/978-3-030-29662-9_4.","short":"T. Ferrere, O. Maler, D. Nickovic, in:, 17th International Conference on Formal Modeling and Analysis of Timed Systems, Springer Nature, 2019, pp. 59–75.","ieee":"T. Ferrere, O. Maler, and D. Nickovic, “Mixed-time signal temporal logic,” in 17th International Conference on Formal Modeling and Analysis of Timed Systems, Amsterdam, The Netherlands, 2019, vol. 11750, pp. 59–75.","chicago":"Ferrere, Thomas, Oded Maler, and Dejan Nickovic. “Mixed-Time Signal Temporal Logic.” In 17th International Conference on Formal Modeling and Analysis of Timed Systems, 11750:59–75. Springer Nature, 2019. https://doi.org/10.1007/978-3-030-29662-9_4.","ista":"Ferrere T, Maler O, Nickovic D. 2019. Mixed-time signal temporal logic. 17th International Conference on Formal Modeling and Analysis of Timed Systems. FORMATS: Formal Modeling and Anaysis of Timed Systems, LNCS, vol. 11750, 59–75.","apa":"Ferrere, T., Maler, O., & Nickovic, D. (2019). Mixed-time signal temporal logic. In 17th International Conference on Formal Modeling and Analysis of Timed Systems (Vol. 11750, pp. 59–75). Amsterdam, The Netherlands: Springer Nature. https://doi.org/10.1007/978-3-030-29662-9_4"},"department":[{"_id":"ToHe"}],"article_processing_charge":"No","user_id":"c635000d-4b10-11ee-a964-aac5a93f6ac1","external_id":{"isi":["000611677700004"]},"status":"public","project":[{"name":"Rigorous Systems Engineering","call_identifier":"FWF","_id":"25832EC2-B435-11E9-9278-68D0E5697425","grant_number":"S 11407_N23"},{"name":"The Wittgenstein Prize","call_identifier":"FWF","_id":"25F42A32-B435-11E9-9278-68D0E5697425","grant_number":"Z211"}],"page":"59-75","publication_identifier":{"isbn":["978-3-0302-9661-2"],"eissn":["1611-3349"],"issn":["0302-9743"]},"isi":1,"type":"conference","date_updated":"2023-09-06T14:57:17Z","volume":11750,"abstract":[{"text":"We present Mixed-time Signal Temporal Logic (STL−MX), a specification formalism which extends STL by capturing the discrete/ continuous time duality found in many cyber-physical systems (CPS), as well as mixed-signal electronic designs. In STL−MX, properties of components with continuous dynamics are expressed in STL, while specifications of components with discrete dynamics are written in LTL. To combine the two layers, we evaluate formulas on two traces, discrete- and continuous-time, and introduce two interface operators that map signals, properties and their satisfaction signals across the two time domains. We show that STL-mx has the expressive power of STL supplemented with an implicit T-periodic clock signal. We develop and implement an algorithm for monitoring STL-mx formulas and illustrate the approach using a mixed-signal example. ","lang":"eng"}],"publication_status":"published","publication":"17th International Conference on Formal Modeling and Analysis of Timed Systems","alternative_title":["LNCS"],"_id":"7232","conference":{"name":"FORMATS: Formal Modeling and Anaysis of Timed Systems","location":"Amsterdam, The Netherlands","start_date":"2019-08-27","end_date":"2019-08-29"},"author":[{"orcid":"0000-0001-5199-3143","full_name":"Ferrere, Thomas","first_name":"Thomas","id":"40960E6E-F248-11E8-B48F-1D18A9856A87","last_name":"Ferrere"},{"last_name":"Maler","full_name":"Maler, Oded","first_name":"Oded"},{"last_name":"Nickovic","id":"41BCEE5C-F248-11E8-B48F-1D18A9856A87","first_name":"Dejan","full_name":"Nickovic, Dejan"}],"doi":"10.1007/978-3-030-29662-9_4","date_published":"2019-08-13T00:00:00Z","day":"13","year":"2019","publisher":"Springer Nature","language":[{"iso":"eng"}],"intvolume":" 11750","oa_version":"None","scopus_import":"1","quality_controlled":"1","title":"Mixed-time signal temporal logic"}