{"publication_identifier":{"isbn":["9781538655603"]},"external_id":{"isi":["000492828500005"]},"author":[{"full_name":"Bakhirkin, Alexey","last_name":"Bakhirkin","first_name":"Alexey"},{"orcid":"0000-0001-5199-3143","first_name":"Thomas","last_name":"Ferrere","full_name":"Ferrere, Thomas","id":"40960E6E-F248-11E8-B48F-1D18A9856A87"},{"first_name":"Thomas A","last_name":"Henzinger","full_name":"Henzinger, Thomas A","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724"},{"first_name":"Deian","last_name":"Nickovicl","full_name":"Nickovicl, Deian"}],"publication":"2018 International Conference on Embedded Software","has_accepted_license":"1","doi":"10.1109/emsoft.2018.8537203","page":"1-10","_id":"5959","language":[{"iso":"eng"}],"conference":{"start_date":"2018-09-30","name":"EMSOFT: International Conference on Embedded Software","location":"Turin, Italy","end_date":"2018-10-05"},"citation":{"ieee":"A. Bakhirkin, T. Ferrere, T. A. Henzinger, and D. Nickovicl, “Keynote: The first-order logic of signals,” in <i>2018 International Conference on Embedded Software</i>, Turin, Italy, 2018, pp. 1–10.","mla":"Bakhirkin, Alexey, et al. “Keynote: The First-Order Logic of Signals.” <i>2018 International Conference on Embedded Software</i>, IEEE, 2018, pp. 1–10, doi:<a href=\"https://doi.org/10.1109/emsoft.2018.8537203\">10.1109/emsoft.2018.8537203</a>.","short":"A. Bakhirkin, T. Ferrere, T.A. Henzinger, D. Nickovicl, in:, 2018 International Conference on Embedded Software, IEEE, 2018, pp. 1–10.","ama":"Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. Keynote: The first-order logic of signals. In: <i>2018 International Conference on Embedded Software</i>. IEEE; 2018:1-10. doi:<a href=\"https://doi.org/10.1109/emsoft.2018.8537203\">10.1109/emsoft.2018.8537203</a>","chicago":"Bakhirkin, Alexey, Thomas Ferrere, Thomas A Henzinger, and Deian Nickovicl. “Keynote: The First-Order Logic of Signals.” In <i>2018 International Conference on Embedded Software</i>, 1–10. IEEE, 2018. <a href=\"https://doi.org/10.1109/emsoft.2018.8537203\">https://doi.org/10.1109/emsoft.2018.8537203</a>.","ista":"Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. 2018. Keynote: The first-order logic of signals. 2018 International Conference on Embedded Software. EMSOFT: International Conference on Embedded Software, 1–10.","apa":"Bakhirkin, A., Ferrere, T., Henzinger, T. A., &#38; Nickovicl, D. (2018). Keynote: The first-order logic of signals. In <i>2018 International Conference on Embedded Software</i> (pp. 1–10). Turin, Italy: IEEE. <a href=\"https://doi.org/10.1109/emsoft.2018.8537203\">https://doi.org/10.1109/emsoft.2018.8537203</a>"},"year":"2018","project":[{"_id":"25832EC2-B435-11E9-9278-68D0E5697425","name":"Rigorous Systems Engineering","grant_number":"S 11407_N23","call_identifier":"FWF"},{"call_identifier":"FWF","grant_number":"Z211","_id":"25F42A32-B435-11E9-9278-68D0E5697425","name":"The Wittgenstein Prize"}],"ddc":["000"],"isi":1,"file_date_updated":"2020-07-14T12:47:13Z","date_updated":"2023-09-19T10:41:29Z","month":"09","article_processing_charge":"No","day":"30","type":"conference","file":[{"file_name":"2018_EMSOFT_Bakhirkin.pdf","access_level":"open_access","creator":"dernst","content_type":"application/pdf","relation":"main_file","checksum":"234a33ad9055b3458fcdda6af251b33a","date_created":"2020-05-14T16:01:29Z","file_size":338006,"file_id":"7839","date_updated":"2020-07-14T12:47:13Z"}],"abstract":[{"text":"Formalizing properties of systems with continuous dynamics is a challenging task. In this paper, we propose a formal framework for specifying and monitoring rich temporal properties of real-valued signals. We introduce signal first-order logic (SFO) as a specification language that combines first-order logic with linear-real arithmetic and unary function symbols interpreted as piecewise-linear signals. We first show that while the satisfiability problem for SFO is undecidable, its membership and monitoring problems are decidable. We develop an offline monitoring procedure for SFO that has polynomial complexity in the size of the input trace and the specification, for a fixed number of quantifiers and function symbols. We show that the algorithm has computation time linear in the size of the input trace for the important fragment of bounded-response specifications interpreted over input traces with finite variability. We can use our results to extend signal temporal logic with first-order quantifiers over time and value parameters, while preserving its efficient monitoring. We finally demonstrate the practical appeal of our logic through a case study in the micro-electronics domain.","lang":"eng"}],"department":[{"_id":"ToHe"}],"date_published":"2018-09-30T00:00:00Z","publication_status":"published","scopus_import":"1","publisher":"IEEE","date_created":"2019-02-13T09:19:28Z","user_id":"c635000d-4b10-11ee-a964-aac5a93f6ac1","oa_version":"Published Version","oa":1,"status":"public","quality_controlled":"1","title":"Keynote: The first-order logic of signals"}