{"date_updated":"2022-07-04T14:51:40Z","publication_identifier":{"issn":["0018-9162"]},"month":"01","article_processing_charge":"No","author":[{"last_name":"Alur","first_name":"Rajeev","full_name":"Alur, Rajeev"},{"full_name":"Henzinger, Thomas A","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","last_name":"Henzinger","first_name":"Thomas A","orcid":"0000−0002−2985−7724"}],"day":"01","publication":"Proceedings 11th Annual IEEE Symposium on Logic in Computer Science","page":"207 - 218","doi":"10.1109/LICS.1996.561320","type":"conference","abstract":[{"lang":"eng","text":"We present a formal model for concurrent systems. The model represents synchronous and asynchronous components in a uniform framework that supports compositional (assume-guarantee) and hierarchical (stepwise refinement) reasoning. While synchronous models are based on a notion of atomic computation step, and asynchronous models remove that notion by introducing stuttering, our model is based on a flexible notion of what constitutes a computation step: by applying an abstraction operator to a system, arbitrarily many consecutive steps can be collapsed into a single step. The abstraction operator, which may turn an asynchronous system into a synchronous one, allows us to describe systems at various levels of temporal detail. For describing systems at various levels of spatial detail, we use a hiding operator that may turn a synchronous system into an asynchronous one. We illustrate the model with diverse examples from synchronous circuits, asynchronous shared-memory programs, and synchronous message passing"}],"main_file_link":[{"url":"https://ieeexplore.ieee.org/document/561320"}],"_id":"4588","language":[{"iso":"eng"}],"publication_status":"published","extern":"1","conference":{"name":"LICS: Logic in Computer Science","start_date":"1996-07-27","end_date":"1996-07-30","location":"New Brunswick, NJ, USA"},"date_published":"1996-01-01T00:00:00Z","citation":{"short":"R. Alur, T.A. Henzinger, in:, Proceedings 11th Annual IEEE Symposium on Logic in Computer Science, IEEE, 1996, pp. 207–218.","apa":"Alur, R., &#38; Henzinger, T. A. (1996). Reactive modules. In <i>Proceedings 11th Annual IEEE Symposium on Logic in Computer Science</i> (pp. 207–218). New Brunswick, NJ, USA: IEEE. <a href=\"https://doi.org/10.1109/LICS.1996.561320\">https://doi.org/10.1109/LICS.1996.561320</a>","chicago":"Alur, Rajeev, and Thomas A Henzinger. “Reactive Modules.” In <i>Proceedings 11th Annual IEEE Symposium on Logic in Computer Science</i>, 207–18. IEEE, 1996. <a href=\"https://doi.org/10.1109/LICS.1996.561320\">https://doi.org/10.1109/LICS.1996.561320</a>.","ista":"Alur R, Henzinger TA. 1996. Reactive modules. Proceedings 11th Annual IEEE Symposium on Logic in Computer Science. LICS: Logic in Computer Science, 207–218.","ama":"Alur R, Henzinger TA. Reactive modules. In: <i>Proceedings 11th Annual IEEE Symposium on Logic in Computer Science</i>. IEEE; 1996:207-218. doi:<a href=\"https://doi.org/10.1109/LICS.1996.561320\">10.1109/LICS.1996.561320</a>","ieee":"R. Alur and T. A. Henzinger, “Reactive modules,” in <i>Proceedings 11th Annual IEEE Symposium on Logic in Computer Science</i>, New Brunswick, NJ, USA, 1996, pp. 207–218.","mla":"Alur, Rajeev, and Thomas A. Henzinger. “Reactive Modules.” <i>Proceedings 11th Annual IEEE Symposium on Logic in Computer Science</i>, IEEE, 1996, pp. 207–18, doi:<a href=\"https://doi.org/10.1109/LICS.1996.561320\">10.1109/LICS.1996.561320</a>."},"scopus_import":"1","year":"1996","publisher":"IEEE","publist_id":"121","user_id":"ea97e931-d5af-11eb-85d4-e6957dddbf17","date_created":"2018-12-11T12:09:37Z","oa_version":"None","status":"public","quality_controlled":"1","title":"Reactive modules"}