{"publist_id":"1069","year":"2010","file_date_updated":"2020-07-14T12:46:28Z","ddc":["004"],"has_accepted_license":"1","author":[{"last_name":"Doyen","first_name":"Laurent","full_name":"Doyen, Laurent"},{"orcid":"0000−0002−2985−7724","first_name":"Thomas A","last_name":"Henzinger","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","full_name":"Henzinger, Thomas A"},{"first_name":"Axel","last_name":"Legay","full_name":"Legay, Axel"},{"id":"41BCEE5C-F248-11E8-B48F-1D18A9856A87","full_name":"Nickovic, Dejan","last_name":"Nickovic","first_name":"Dejan"}],"page":"77 - 84","doi":"10.1109/ACSD.2010.26","citation":{"ieee":"L. Doyen, T. A. Henzinger, A. Legay, and D. Nickovic, “Robustness of sequential circuits,” presented at the ACSD: Application of Concurrency to System Design, 2010, pp. 77–84.","mla":"Doyen, Laurent, et al. <i>Robustness of Sequential Circuits</i>. IEEE, 2010, pp. 77–84, doi:<a href=\"https://doi.org/10.1109/ACSD.2010.26\">10.1109/ACSD.2010.26</a>.","short":"L. Doyen, T.A. Henzinger, A. Legay, D. Nickovic, in:, IEEE, 2010, pp. 77–84.","chicago":"Doyen, Laurent, Thomas A Henzinger, Axel Legay, and Dejan Nickovic. “Robustness of Sequential Circuits,” 77–84. IEEE, 2010. <a href=\"https://doi.org/10.1109/ACSD.2010.26\">https://doi.org/10.1109/ACSD.2010.26</a>.","ista":"Doyen L, Henzinger TA, Legay A, Nickovic D. 2010. Robustness of sequential circuits. ACSD: Application of Concurrency to System Design, 77–84.","apa":"Doyen, L., Henzinger, T. A., Legay, A., &#38; Nickovic, D. (2010). Robustness of sequential circuits (pp. 77–84). Presented at the ACSD: Application of Concurrency to System Design, IEEE. <a href=\"https://doi.org/10.1109/ACSD.2010.26\">https://doi.org/10.1109/ACSD.2010.26</a>","ama":"Doyen L, Henzinger TA, Legay A, Nickovic D. Robustness of sequential circuits. In: IEEE; 2010:77-84. doi:<a href=\"https://doi.org/10.1109/ACSD.2010.26\">10.1109/ACSD.2010.26</a>"},"conference":{"name":"ACSD: Application of Concurrency to System Design"},"_id":"4389","language":[{"iso":"eng"}],"pubrep_id":"44","oa_version":"Submitted Version","oa":1,"user_id":"4435EBFC-F248-11E8-B48F-1D18A9856A87","date_created":"2018-12-11T12:08:36Z","publisher":"IEEE","scopus_import":1,"quality_controlled":"1","title":"Robustness of sequential circuits","status":"public","type":"conference","file":[{"file_name":"IST-2012-44-v1+1_Robustness_of_sequential_circuits.pdf","creator":"system","access_level":"open_access","content_type":"application/pdf","relation":"main_file","checksum":"42b2952bfc6b6974617bd554842b904a","file_size":159920,"date_created":"2018-12-12T10:09:10Z","file_id":"4733","date_updated":"2020-07-14T12:46:28Z"}],"day":"23","month":"08","date_updated":"2021-01-12T07:56:36Z","date_published":"2010-08-23T00:00:00Z","publication_status":"published","department":[{"_id":"ToHe"}],"abstract":[{"lang":"eng","text":"Digital components play a central role in the design of complex embedded systems. These components are interconnected with other, possibly analog, devices and the physical environment. This environment cannot be entirely captured and can provide inaccurate input data to the component. It is thus important for digital components to have a robust behavior, i.e. the presence of a small change in the input sequences should not result in a drastic change in the output sequences. In this paper, we study a notion of robustness for sequential circuits. However, since sequential circuits may have parts that are naturally discontinuous (e.g., digital controllers with switching behavior), we need a flexible framework that accommodates this fact and leaves discontinuous parts of the circuit out from the robustness analysis. As a consequence, we consider sequential circuits that have their input variables partitioned into two disjoint sets: control and disturbance variables. Our contributions are (1) a definition of robustness for sequential circuits as a form of continuity with respect to disturbance variables, (2) the characterization of the exact class of sequential circuits that are robust according to our definition, (3) an algorithm to decide whether a sequential circuit is robust or not."}]}