{"language":[{"iso":"eng"}],"publist_id":"5825","oa_version":"Preprint","main_file_link":[{"url":"http://arxiv.org/abs/1308.4767","open_access":"1"}],"title":"Synthesizing multiple boolean functions using interpolation on a single proof","quality_controlled":"1","date_published":"2013-12-11T00:00:00Z","ec_funded":1,"publisher":"IEEE","year":"2013","day":"11","date_updated":"2021-01-12T06:50:19Z","type":"conference","publication":"2013 Formal Methods in Computer-Aided Design","publication_status":"published","abstract":[{"lang":"eng","text":"It is often difficult to correctly implement a Boolean controller for a complex system, especially when concurrency is involved. Yet, it may be easy to formally specify a controller. For instance, for a pipelined processor it suffices to state that the visible behavior of the pipelined system should be identical to a non-pipelined reference system (Burch-Dill paradigm). We present a novel procedure to efficiently synthesize multiple Boolean control signals from a specification given as a quantified first-order formula (with a specific quantifier structure). Our approach uses uninterpreted functions to abstract details of the design. We construct an unsatisfiable SMT formula from the given specification. Then, from just one proof of unsatisfiability, we use a variant of Craig interpolation to compute multiple coordinated interpolants that implement the Boolean control signals. Our method avoids iterative learning and back-substitution of the control functions. We applied our approach to synthesize a controller for a simple two-stage pipelined processor, and present first experimental results."}],"doi":"10.1109/FMCAD.2013.6679394","conference":{"end_date":"2013-10-23","start_date":"2013-10-20","name":"FMCAD: Formal Methods in Computer-Aided Design","location":"Portland, OR, United States"},"author":[{"full_name":"Hofferek, Georg","first_name":"Georg","last_name":"Hofferek"},{"last_name":"Gupta","id":"335E5684-F248-11E8-B48F-1D18A9856A87","first_name":"Ashutosh","full_name":"Gupta, Ashutosh"},{"full_name":"Könighofer, Bettina","first_name":"Bettina","last_name":"Könighofer"},{"full_name":"Jiang, Jie","first_name":"Jie","last_name":"Jiang"},{"full_name":"Bloem, Roderick","first_name":"Roderick","last_name":"Bloem"}],"_id":"1385","citation":{"apa":"Hofferek, G., Gupta, A., Könighofer, B., Jiang, J., &#38; Bloem, R. (2013). Synthesizing multiple boolean functions using interpolation on a single proof. In <i>2013 Formal Methods in Computer-Aided Design</i> (pp. 77–84). Portland, OR, United States: IEEE. <a href=\"https://doi.org/10.1109/FMCAD.2013.6679394\">https://doi.org/10.1109/FMCAD.2013.6679394</a>","chicago":"Hofferek, Georg, Ashutosh Gupta, Bettina Könighofer, Jie Jiang, and Roderick Bloem. “Synthesizing Multiple Boolean Functions Using Interpolation on a Single Proof.” In <i>2013 Formal Methods in Computer-Aided Design</i>, 77–84. IEEE, 2013. <a href=\"https://doi.org/10.1109/FMCAD.2013.6679394\">https://doi.org/10.1109/FMCAD.2013.6679394</a>.","ista":"Hofferek G, Gupta A, Könighofer B, Jiang J, Bloem R. 2013. Synthesizing multiple boolean functions using interpolation on a single proof. 2013 Formal Methods in Computer-Aided Design. FMCAD: Formal Methods in Computer-Aided Design, 77–84.","ieee":"G. Hofferek, A. Gupta, B. Könighofer, J. Jiang, and R. Bloem, “Synthesizing multiple boolean functions using interpolation on a single proof,” in <i>2013 Formal Methods in Computer-Aided Design</i>, Portland, OR, United States, 2013, pp. 77–84.","short":"G. Hofferek, A. Gupta, B. Könighofer, J. Jiang, R. Bloem, in:, 2013 Formal Methods in Computer-Aided Design, IEEE, 2013, pp. 77–84.","ama":"Hofferek G, Gupta A, Könighofer B, Jiang J, Bloem R. Synthesizing multiple boolean functions using interpolation on a single proof. In: <i>2013 Formal Methods in Computer-Aided Design</i>. IEEE; 2013:77-84. doi:<a href=\"https://doi.org/10.1109/FMCAD.2013.6679394\">10.1109/FMCAD.2013.6679394</a>","mla":"Hofferek, Georg, et al. “Synthesizing Multiple Boolean Functions Using Interpolation on a Single Proof.” <i>2013 Formal Methods in Computer-Aided Design</i>, IEEE, 2013, pp. 77–84, doi:<a href=\"https://doi.org/10.1109/FMCAD.2013.6679394\">10.1109/FMCAD.2013.6679394</a>."},"date_created":"2018-12-11T11:51:43Z","month":"12","acknowledgement":"This research was supported by the European Commission through project\r\nDIAMOND  (FP7-2009-IST-4-248613), and  QUAINT  (I774-N23),  ","department":[{"_id":"ToHe"}],"user_id":"2DF688A6-F248-11E8-B48F-1D18A9856A87","oa":1,"page":"77 - 84","status":"public","project":[{"call_identifier":"FWF","name":"Rigorous Systems Engineering","grant_number":"S 11407_N23","_id":"25832EC2-B435-11E9-9278-68D0E5697425"},{"_id":"25EE3708-B435-11E9-9278-68D0E5697425","grant_number":"267989","name":"Quantitative Reactive Modeling","call_identifier":"FP7"}],"external_id":{"arxiv":["1308.4767"]}}