[{"date_updated":"2021-01-12T07:56:35Z","status":"public","date_created":"2018-12-11T12:08:35Z","date_published":"2008-09-10T00:00:00Z","main_file_link":[{"url":"http://pub.ist.ac.at/%7Etah/Publications/permissiveness_in_transactional_memories.pdf","open_access":"0"}],"abstract":[{"text":"We introduce the notion of permissiveness in transactional memories (TM). Intuitively, a TM is permissive if it never aborts a transaction when it need not. More specifically, a TM is permissive with respect to a safety property p if the TM accepts every history that satisfies p. Permissiveness, like safety and liveness, can be used as a metric to compare TMs. We illustrate that it is impractical to achieve permissiveness deterministically, and then show how randomization can be used to achieve permissiveness efficiently. We introduce Adaptive Validation STM (AVSTM), which is probabilistically permissive with respect to opacity; that is, every opaque history is accepted by AVSTM with positive probability. Moreover, AVSTM guarantees lock freedom. Owing to its permissiveness, AVSTM outperforms other STMs by up to 40% in read dominated workloads in high contention scenarios. But, in low contention scenarios, the book-keeping done by AVSTM to achieve permissiveness makes AVSTM, on average, 20-30% worse than existing STMs.","lang":"eng"}],"day":"10","page":"305 - 319","title":"Permissiveness in transactional memories","conference":{"name":"DISC: Distributed Computing"},"year":"2008","volume":5218,"month":"09","type":"conference","citation":{"ieee":"R. Guerraoui, T. A. Henzinger, and V. Singh, “Permissiveness in transactional memories,” presented at the DISC: Distributed Computing, 2008, vol. 5218, pp. 305–319.","mla":"Guerraoui, Rachid, et al. <i>Permissiveness in Transactional Memories</i>. Vol. 5218, Springer, 2008, pp. 305–19, doi:<a href=\"https://doi.org/10.1007/978-3-540-87779-0_21\">10.1007/978-3-540-87779-0_21</a>.","short":"R. Guerraoui, T.A. Henzinger, V. Singh, in:, Springer, 2008, pp. 305–319.","ama":"Guerraoui R, Henzinger TA, Singh V. Permissiveness in transactional memories. In: Vol 5218. Springer; 2008:305-319. doi:<a href=\"https://doi.org/10.1007/978-3-540-87779-0_21\">10.1007/978-3-540-87779-0_21</a>","apa":"Guerraoui, R., Henzinger, T. A., &#38; Singh, V. (2008). Permissiveness in transactional memories (Vol. 5218, pp. 305–319). Presented at the DISC: Distributed Computing, Springer. <a href=\"https://doi.org/10.1007/978-3-540-87779-0_21\">https://doi.org/10.1007/978-3-540-87779-0_21</a>","chicago":"Guerraoui, Rachid, Thomas A Henzinger, and Vasu Singh. “Permissiveness in Transactional Memories,” 5218:305–19. Springer, 2008. <a href=\"https://doi.org/10.1007/978-3-540-87779-0_21\">https://doi.org/10.1007/978-3-540-87779-0_21</a>.","ista":"Guerraoui R, Henzinger TA, Singh V. 2008. Permissiveness in transactional memories. DISC: Distributed Computing, LNCS, vol. 5218, 305–319."},"author":[{"full_name":"Guerraoui, Rachid","first_name":"Rachid","last_name":"Guerraoui"},{"id":"40876CD8-F248-11E8-B48F-1D18A9856A87","full_name":"Thomas Henzinger","orcid":"0000−0002−2985−7724","last_name":"Henzinger","first_name":"Thomas A"},{"id":"4DAE2708-F248-11E8-B48F-1D18A9856A87","full_name":"Vasu Singh","last_name":"Singh","first_name":"Vasu"}],"publication_status":"published","publist_id":"1072","doi":"10.1007/978-3-540-87779-0_21","publisher":"Springer","alternative_title":["LNCS"],"extern":1,"intvolume":"      5218","quality_controlled":0,"_id":"4386","acknowledgement":"This research was supported by the Swiss National Science Foundation."},{"intvolume":"      5201","extern":1,"acknowledgement":"This research was supported by the Swiss National Science Foundation.","quality_controlled":0,"_id":"4387","doi":"10.1007/978-3-540-85361-9_6","publist_id":"1071","alternative_title":["LNCS"],"publisher":"Schloss Dagstuhl - Leibniz-Zentrum für Informatik","author":[{"full_name":"Guerraoui, Rachid","last_name":"Guerraoui","first_name":"Rachid"},{"full_name":"Thomas Henzinger","orcid":"0000−0002−2985−7724","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","first_name":"Thomas A","last_name":"Henzinger"},{"first_name":"Vasu","last_name":"Singh","full_name":"Vasu Singh","id":"4DAE2708-F248-11E8-B48F-1D18A9856A87"}],"publication_status":"published","citation":{"chicago":"Guerraoui, Rachid, Thomas A Henzinger, and Vasu Singh. “Completeness and Nondeterminism in Model Checking Transactional Memories,” 5201:21–35. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2008. <a href=\"https://doi.org/10.1007/978-3-540-85361-9_6\">https://doi.org/10.1007/978-3-540-85361-9_6</a>.","ista":"Guerraoui R, Henzinger TA, Singh V. 2008. Completeness and nondeterminism in model checking transactional memories. CONCUR: Concurrency Theory, LNCS, vol. 5201, 21–35.","mla":"Guerraoui, Rachid, et al. <i>Completeness and Nondeterminism in Model Checking Transactional Memories</i>. Vol. 5201, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2008, pp. 21–35, doi:<a href=\"https://doi.org/10.1007/978-3-540-85361-9_6\">10.1007/978-3-540-85361-9_6</a>.","ieee":"R. Guerraoui, T. A. Henzinger, and V. Singh, “Completeness and nondeterminism in model checking transactional memories,” presented at the CONCUR: Concurrency Theory, 2008, vol. 5201, pp. 21–35.","short":"R. Guerraoui, T.A. Henzinger, V. Singh, in:, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, 2008, pp. 21–35.","apa":"Guerraoui, R., Henzinger, T. A., &#38; Singh, V. (2008). Completeness and nondeterminism in model checking transactional memories (Vol. 5201, pp. 21–35). Presented at the CONCUR: Concurrency Theory, Schloss Dagstuhl - Leibniz-Zentrum für Informatik. <a href=\"https://doi.org/10.1007/978-3-540-85361-9_6\">https://doi.org/10.1007/978-3-540-85361-9_6</a>","ama":"Guerraoui R, Henzinger TA, Singh V. Completeness and nondeterminism in model checking transactional memories. In: Vol 5201. Schloss Dagstuhl - Leibniz-Zentrum für Informatik; 2008:21-35. doi:<a href=\"https://doi.org/10.1007/978-3-540-85361-9_6\">10.1007/978-3-540-85361-9_6</a>"},"volume":5201,"year":"2008","type":"conference","month":"07","day":"30","abstract":[{"lang":"eng","text":"Software transactional memory (STM) offers a disciplined concurrent programming model for exploiting the parallelism of modern processor architectures. This paper presents the first deterministic specification automata for strict serializability and opacity in STMs. Using an antichain-based tool, we show our deterministic specifications to be equivalent to more intuitive, nondeterministic specification automata (which are too large to be determinized automatically). Using deterministic specification automata, we obtain a complete verification tool for STMs. We also show how to model and verify contention management within STMs. We automatically check the opacity of popular STM algorithms, such as TL2 and DSTM, with a universal contention manager. The universal contention manager is nondeterministic and establishes correctness for all possible contention management schemes."}],"conference":{"name":"CONCUR: Concurrency Theory"},"title":"Completeness and nondeterminism in model checking transactional memories","page":"21 - 35","status":"public","date_updated":"2021-01-12T07:56:35Z","main_file_link":[{"url":"http://pub.ist.ac.at/%7Etah/Publications/completeness_and_nondeterminism_in_model_checking_transactional_memories.pdf","open_access":"0"}],"date_published":"2008-07-30T00:00:00Z","date_created":"2018-12-11T12:08:35Z"},{"publist_id":"1060","publisher":"Springer","alternative_title":["LNCS 5123"],"publication_status":"published","author":[{"first_name":"Dirk","last_name":"Beyer","full_name":"Beyer, Dirk"},{"last_name":"Zufferey","first_name":"Damien","id":"4397AC76-F248-11E8-B48F-1D18A9856A87","orcid":"0000-0002-3197-8736","full_name":"Damien Zufferey"},{"first_name":"Ritankar","last_name":"Majumdar","full_name":"Majumdar, Ritankar S"}],"extern":1,"_id":"4397","quality_controlled":0,"day":"01","page":"304 - 308","conference":{"name":"CAV: Computer Aided Verification"},"title":"CSIsat: Interpolation for LA+EUF","status":"public","date_updated":"2021-01-12T07:56:40Z","date_created":"2018-12-11T12:08:38Z","date_published":"2008-01-01T00:00:00Z","citation":{"ista":"Beyer D, Zufferey D, Majumdar R. 2008. CSIsat: Interpolation for LA+EUF. CAV: Computer Aided Verification, LNCS 5123, , 304–308.","chicago":"Beyer, Dirk, Damien Zufferey, and Ritankar Majumdar. “CSIsat: Interpolation for LA+EUF,” 304–8. Springer, 2008.","apa":"Beyer, D., Zufferey, D., &#38; Majumdar, R. (2008). CSIsat: Interpolation for LA+EUF (pp. 304–308). Presented at the CAV: Computer Aided Verification, Springer.","ama":"Beyer D, Zufferey D, Majumdar R. CSIsat: Interpolation for LA+EUF. In: Springer; 2008:304-308.","short":"D. Beyer, D. Zufferey, R. Majumdar, in:, Springer, 2008, pp. 304–308.","mla":"Beyer, Dirk, et al. <i>CSIsat: Interpolation for LA+EUF</i>. Springer, 2008, pp. 304–08.","ieee":"D. Beyer, D. Zufferey, and R. Majumdar, “CSIsat: Interpolation for LA+EUF,” presented at the CAV: Computer Aided Verification, 2008, pp. 304–308."},"year":"2008","month":"01","type":"conference"},{"month":"07","type":"conference","year":"2008","citation":{"chicago":"Aviv, Adam, Pavol Cerny, Sandy Clark, Eric Cronin, Gaurav Shah, Micah Sherr, and Matt Blaze. “Security Evaluation of ES&#38;amp;S Voting Machines and Election Management System.” USENIX, 2008. <a href=\"https://doi.org/1545\">https://doi.org/1545</a>.","ista":"Aviv A, Cerny P, Clark S, Cronin E, Shah G, Sherr M, Blaze M. 2008. Security Evaluation of ES&#38;amp;S Voting Machines and Election Management System. Usenix/ Accurate Electronic Voting Technology Workshop (EVT) 08.","short":"A. Aviv, P. Cerny, S. Clark, E. Cronin, G. Shah, M. Sherr, M. Blaze, in:, USENIX, 2008.","ieee":"A. Aviv <i>et al.</i>, “Security Evaluation of ES&#38;amp;S Voting Machines and Election Management System,” presented at the Usenix/ Accurate Electronic Voting Technology Workshop (EVT) 08, 2008.","mla":"Aviv, Adam, et al. <i>Security Evaluation of ES&#38;amp;S Voting Machines and Election Management System</i>. USENIX, 2008, doi:<a href=\"https://doi.org/1545\">1545</a>.","ama":"Aviv A, Cerny P, Clark S, et al. Security Evaluation of ES&#38;amp;S Voting Machines and Election Management System. In: USENIX; 2008. doi:<a href=\"https://doi.org/1545\">1545</a>","apa":"Aviv, A., Cerny, P., Clark, S., Cronin, E., Shah, G., Sherr, M., &#38; Blaze, M. (2008). Security Evaluation of ES&#38;amp;S Voting Machines and Election Management System. Presented at the Usenix/ Accurate Electronic Voting Technology Workshop (EVT) 08, USENIX. <a href=\"https://doi.org/1545\">https://doi.org/1545</a>"},"date_created":"2018-12-11T12:08:39Z","date_published":"2008-07-29T00:00:00Z","main_file_link":[{"open_access":"0","url":"http://www.usenix.org/event/evt08/tech/full_papers/aviv/aviv.pdf"}],"status":"public","date_updated":"2021-01-12T07:56:42Z","title":"Security Evaluation of ES&amp;S Voting Machines and Election Management System","conference":{"name":"Usenix/ Accurate Electronic Voting Technology Workshop (EVT) 08"},"day":"29","_id":"4400","quality_controlled":0,"extern":1,"publication_status":"published","author":[{"last_name":"Aviv","first_name":"Adam","full_name":"Aviv,Adam J."},{"id":"4DCBEFFE-F248-11E8-B48F-1D18A9856A87","full_name":"Pavol Cerny","last_name":"Cerny","first_name":"Pavol"},{"full_name":"Clark,Sandy","last_name":"Clark","first_name":"Sandy"},{"full_name":"Cronin,Eric","first_name":"Eric","last_name":"Cronin"},{"first_name":"Gaurav","last_name":"Shah","full_name":"Shah,Gaurav"},{"full_name":"Sherr,Micah","first_name":"Micah","last_name":"Sherr"},{"full_name":"Blaze,Matt","last_name":"Blaze","first_name":"Matt"}],"publisher":"USENIX","publist_id":"1057","doi":"1545"},{"abstract":[{"lang":"eng","text":"Models of timed systems must incorporate not only the sequence of system events, but the timings of these events as well to capture the real-time aspects of physical systems. Timed automata are models of real-time systems in which states consist of discrete locations and values for real-time clocks. The presence of real-time clocks leads to an uncountable state space. This thesis studies verification problems on timed automata in a game theoretic framework.\r\n\r\nFor untimed systems, two systems are close if every sequence of events of one system is also observable in the second system. For timed systems, the difference in timings of the two corresponding sequences is also of importance. We propose the notion of bisimulation distance which quantifies timing differences; if the bisimulation distance between two systems is epsilon, then (a) every sequence of events of one system has a corresponding matching sequence in the other, and (b) the timings of matching events in between the two corresponding traces do not differ by more than epsilon. We show that we can compute the bisimulation distance between two timed automata to within any desired degree of accuracy. We also show that the timed verification logic TCTL is robust with respect to our notion of quantitative bisimilarity, in particular, if a system satisfies a formula, then every close system satisfies a close formula.\r\n\r\nTimed games are used for distinguishing between the actions of several agents, typically a controller and an environment. The controller must achieve its objective against all possible choices of the environment. The modeling of the passage of time leads to the presence of zeno executions, and corresponding unrealizable strategies of the controller which may achieve objectives by blocking time. We disallow such unreasonable strategies by restricting all agents to use only receptive strategies --strategies which while not being required to ensure time divergence by any agent, are such that no agent is responsible for blocking time. Time divergence is guaranteed when all players use receptive strategies. We show that timed automaton games with receptive strategies can be solved by a reduction to finite state turn based game graphs. We define the logic timed alternating-time temporal logic for verification of timed automaton games and show that the logic can be model checked in EXPTIME. We also show that the minimum time required by an agent to reach a desired location, and the maximum time an agent can stay safe within a set of locations, against all possible actions of its adversaries are both computable.\r\n\r\nWe next study the memory requirements of winning strategies for timed automaton games. We prove that finite memory strategies suffice for safety objectives, and that winning strategies for reachability objectives may require infinite memory in general. We introduce randomized strategies in which an agent can propose a probabilistic distribution of moves and show that finite memory randomized strategies suffice for all omega-regular objectives. We also show that while randomization helps in simplifying winning strategies, and thus allows the construction of simpler controllers, it does not help a player in winning at more states, and thus does not allow the construction of more powerful controllers.\r\n\r\nFinally we study robust winning strategies in timed games. In a physical system, a controller may propose an action together with a time delay, but the action cannot be assumed to be executed at the exact proposed time delay. We present robust strategies which incorporate such jitters and show that the set of states from which an agent can win robustly is computable."}],"day":"01","page":"1 - 137","title":"Games for the verification of timed systems","status":"public","date_updated":"2022-02-14T14:35:11Z","date_created":"2018-12-11T12:08:42Z","date_published":"2008-09-01T00:00:00Z","main_file_link":[{"url":"https://www2.eecs.berkeley.edu/Pubs/TechRpts/2008/EECS-2008-97.html","open_access":"1"}],"language":[{"iso":"eng"}],"oa_version":"None","citation":{"mla":"Prabhu, Vinayak. <i>Games for the Verification of Timed Systems</i>. University of California, Berkeley, 2008, pp. 1–137.","ieee":"V. Prabhu, “Games for the verification of timed systems,” University of California, Berkeley, 2008.","short":"V. Prabhu, Games for the Verification of Timed Systems, University of California, Berkeley, 2008.","apa":"Prabhu, V. (2008). <i>Games for the verification of timed systems</i>. University of California, Berkeley.","ama":"Prabhu V. Games for the verification of timed systems. 2008:1-137.","chicago":"Prabhu, Vinayak. “Games for the Verification of Timed Systems.” University of California, Berkeley, 2008.","ista":"Prabhu V. 2008. Games for the verification of timed systems. University of California, Berkeley."},"year":"2008","supervisor":[{"last_name":"Henzinger","first_name":"Thomas A","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","full_name":"Henzinger, Thomas A","orcid":"0000-0002-2985-7724"},{"full_name":"Steel, John","first_name":"John","last_name":"Steel"},{"full_name":"Varaiya, Pravin","first_name":"Pravin","last_name":"Varaiya"}],"month":"09","type":"dissertation","publist_id":"319","publisher":"University of California, Berkeley","oa":1,"publication_status":"published","author":[{"full_name":"Prabhu, Vinayak","first_name":"Vinayak","last_name":"Prabhu"}],"extern":"1","_id":"4409","degree_awarded":"PhD","article_processing_charge":"No","user_id":"8b945eb4-e2f2-11eb-945a-df72226e66a9"},{"language":[{"iso":"eng"}],"citation":{"apa":"Matic, S. (2008). <i>Compositionality in deterministic real-time embedded systems</i>. University of California, Berkeley.","ama":"Matic S. Compositionality in deterministic real-time embedded systems. 2008:1-148.","ieee":"S. Matic, “Compositionality in deterministic real-time embedded systems,” University of California, Berkeley, 2008.","mla":"Matic, Slobodan. <i>Compositionality in Deterministic Real-Time Embedded Systems</i>. University of California, Berkeley, 2008, pp. 1–148.","short":"S. Matic, Compositionality in Deterministic Real-Time Embedded Systems, University of California, Berkeley, 2008.","ista":"Matic S. 2008. Compositionality in deterministic real-time embedded systems. University of California, Berkeley.","chicago":"Matic, Slobodan. “Compositionality in Deterministic Real-Time Embedded Systems.” University of California, Berkeley, 2008."},"oa_version":"None","supervisor":[{"last_name":"Henzinger","first_name":"Thomas A","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000-0002-2985-7724","full_name":"Henzinger, Thomas A"},{"first_name":"Edward","last_name":"Lee","full_name":"Lee, Edward"},{"full_name":"Sengupta, Raja","last_name":"Sengupta","first_name":"Raja"}],"year":"2008","month":"01","type":"dissertation","abstract":[{"text":"Many computing applications, especially those in safety critical embedded systems, require highly predictable timing properties. However, time is often not present in the prevailing computing and networking abstractions. In fact, most advances in computer architecture, software, and networking favor average-case performance over timing predictability. This thesis studies several methods for the design of concurrent and/or distributed embedded systems with precise timing guarantees. The focus is on flexible and compositional methods for programming and verification of the timing properties. The presented methods together with related formalisms cover two levels of design: (1) Programming language/model level. We propose the distributed variant of Giotto, a coordination programming language with an explicit temporal semantics—the logical execution time (LET) semantics. The LET of a task is an interval of time that specifies the time instants at which task inputs and outputs become available (task release and termination instants). The LET of a task is always non-zero. This allows us to communicate values across the network without changing the timing information of the task, and without introducing nondeterminism. We show how this methodology supports distributed code generation for distributed real-time systems. The method gives up some performance in favor of composability and predictability. We characterize the tradeoff by comparing the LET semantics with the semantics used in Simulink. (2) Abstract task graph level. We study interface-based design and verification of applications represented with task graphs. We consider task sequence graphs with general event models, and cyclic graphs with periodic event models with jitter and phase. Here an interface of a component exposes time and resource constraints of the component. Together with interfaces we formally define interface composition operations and the refinement relation. For efficient and flexible composability checking two properties are important: incremental design and independent refinement. According to the incremental design property the composition of interfaces can be performed in any order, even if interfaces for some components are not known. The refinement relation is defined such that in a design we can always substitute a refined interface for an abstract one. We show that the framework supports independent refinement, i.e., the refinement relation is preserved under composition operations.","lang":"eng"}],"day":"01","page":"1 - 148","title":"Compositionality in deterministic real-time embedded systems","status":"public","date_updated":"2022-02-14T14:08:50Z","date_created":"2018-12-11T12:08:44Z","date_published":"2008-01-01T00:00:00Z","extern":"1","article_processing_charge":"No","_id":"4415","degree_awarded":"PhD","user_id":"8b945eb4-e2f2-11eb-945a-df72226e66a9","acknowledgement":"978-0-549-83480-9","publist_id":"316","publisher":"University of California, Berkeley","author":[{"last_name":"Matic","first_name":"Slobodan","full_name":"Matic, Slobodan"}],"publication_status":"published"},{"citation":{"chicago":"Henzinger, Thomas A, Thibaud Hottelier, and Laura Kovács. “Valigator: A Verification Tool with Bound and Invariant Generation,” 5330:333–42. Springer, 2008. <a href=\"https://doi.org/10.1007/978-3-540-89439-1_24\">https://doi.org/10.1007/978-3-540-89439-1_24</a>.","ista":"Henzinger TA, Hottelier T, Kovács L. 2008. Valigator: A verification tool with bound and invariant generation. LPAR: Logic for Programming, Artificial Intelligence, and Reasoning, LNCS, vol. 5330, 333–342.","mla":"Henzinger, Thomas A., et al. <i>Valigator: A Verification Tool with Bound and Invariant Generation</i>. Vol. 5330, Springer, 2008, pp. 333–42, doi:<a href=\"https://doi.org/10.1007/978-3-540-89439-1_24\">10.1007/978-3-540-89439-1_24</a>.","ieee":"T. A. Henzinger, T. Hottelier, and L. Kovács, “Valigator: A verification tool with bound and invariant generation,” presented at the LPAR: Logic for Programming, Artificial Intelligence, and Reasoning, 2008, vol. 5330, pp. 333–342.","short":"T.A. Henzinger, T. Hottelier, L. Kovács, in:, Springer, 2008, pp. 333–342.","ama":"Henzinger TA, Hottelier T, Kovács L. Valigator: A verification tool with bound and invariant generation. In: Vol 5330. Springer; 2008:333-342. doi:<a href=\"https://doi.org/10.1007/978-3-540-89439-1_24\">10.1007/978-3-540-89439-1_24</a>","apa":"Henzinger, T. A., Hottelier, T., &#38; Kovács, L. (2008). Valigator: A verification tool with bound and invariant generation (Vol. 5330, pp. 333–342). Presented at the LPAR: Logic for Programming, Artificial Intelligence, and Reasoning, Springer. <a href=\"https://doi.org/10.1007/978-3-540-89439-1_24\">https://doi.org/10.1007/978-3-540-89439-1_24</a>"},"volume":5330,"year":"2008","type":"conference","month":"11","day":"13","abstract":[{"text":"We describe Valigator, a software tool for imperative program verification that efficiently combines symbolic computation and automated reasoning in a uniform framework. The system offers support for automatically generating and proving verification conditions and, most importantly, for automatically inferring loop invariants and bound assertions by means of symbolic summation, Gröbner basis computation, and quantifier elimination. We present general principles of the implementation and illustrate them on examples.","lang":"eng"}],"title":"Valigator: A verification tool with bound and invariant generation","conference":{"name":"LPAR: Logic for Programming, Artificial Intelligence, and Reasoning"},"page":"333 - 342","status":"public","date_updated":"2021-01-12T07:57:04Z","date_published":"2008-11-13T00:00:00Z","main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/valigator.pdf"}],"date_created":"2018-12-11T12:08:55Z","intvolume":"      5330","extern":1,"acknowledgement":"This research was supported by the Swiss NSF.","quality_controlled":0,"_id":"4452","doi":"10.1007/978-3-540-89439-1_24","publist_id":"277","alternative_title":["LNCS"],"publisher":"Springer","author":[{"id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724","full_name":"Thomas Henzinger","last_name":"Henzinger","first_name":"Thomas A"},{"first_name":"Thibaud","last_name":"Hottelier","full_name":"Hottelier, Thibaud"},{"last_name":"Kovács","first_name":"Laura","full_name":"Kovács, Laura"}],"publication_status":"published"},{"quality_controlled":0,"_id":"4509","intvolume":"       366","extern":1,"publisher":"Royal Society of London","doi":"10.1098/rsta.2008.0141","publist_id":"219","author":[{"id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724","full_name":"Thomas Henzinger","last_name":"Henzinger","first_name":"Thomas A"}],"publication_status":"published","citation":{"ieee":"T. A. Henzinger, “Two challenges in embedded systems design: Predictability and robustness,” <i>Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences</i>, vol. 366, no. 1881. Royal Society of London, pp. 3727–3736, 2008.","mla":"Henzinger, Thomas A. “Two Challenges in Embedded Systems Design: Predictability and Robustness.” <i>Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences</i>, vol. 366, no. 1881, Royal Society of London, 2008, pp. 3727–36, doi:<a href=\"https://doi.org/10.1098/rsta.2008.0141\">10.1098/rsta.2008.0141</a>.","short":"T.A. Henzinger, Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences 366 (2008) 3727–3736.","ama":"Henzinger TA. Two challenges in embedded systems design: Predictability and robustness. <i>Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences</i>. 2008;366(1881):3727-3736. doi:<a href=\"https://doi.org/10.1098/rsta.2008.0141\">10.1098/rsta.2008.0141</a>","apa":"Henzinger, T. A. (2008). Two challenges in embedded systems design: Predictability and robustness. <i>Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences</i>. Royal Society of London. <a href=\"https://doi.org/10.1098/rsta.2008.0141\">https://doi.org/10.1098/rsta.2008.0141</a>","chicago":"Henzinger, Thomas A. “Two Challenges in Embedded Systems Design: Predictability and Robustness.” <i>Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences</i>. Royal Society of London, 2008. <a href=\"https://doi.org/10.1098/rsta.2008.0141\">https://doi.org/10.1098/rsta.2008.0141</a>.","ista":"Henzinger TA. 2008. Two challenges in embedded systems design: Predictability and robustness. Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences. 366(1881), 3727–3736."},"type":"journal_article","month":"07","year":"2008","volume":366,"title":"Two challenges in embedded systems design: Predictability and robustness","publication":"Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences","page":"3727 - 3736","day":"31","abstract":[{"text":"I discuss two main challenges in embedded systems design: the challenge to build predictable systems, and that to build robust systems. I suggest how predictability can be formalized as a form of determinism, and robustness as a form of continuity.","lang":"eng"}],"date_published":"2008-07-31T00:00:00Z","main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/two_challenges_in_embedded_systems_design.pdf"}],"date_created":"2018-12-11T12:09:13Z","issue":"1881","status":"public","date_updated":"2021-01-12T07:59:19Z"},{"publist_id":"208","doi":"10.1145/1328438.1328459","publisher":"ACM","author":[{"last_name":"Gupta","first_name":"Ashutosh","id":"335E5684-F248-11E8-B48F-1D18A9856A87","full_name":"Ashutosh Gupta"},{"id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724","full_name":"Thomas Henzinger","last_name":"Henzinger","first_name":"Thomas A"},{"full_name":"Majumdar, Ritankar S","last_name":"Majumdar","first_name":"Ritankar"},{"full_name":"Rybalchenko, Andrey","first_name":"Andrey","last_name":"Rybalchenko"},{"full_name":"Xu, Ru-Gang","first_name":"Ru","last_name":"Xu"}],"publication_status":"published","extern":1,"quality_controlled":0,"_id":"4521","abstract":[{"lang":"eng","text":"The search for proof and the search for counterexamples (bugs) are complementary activities that need to be pursued concurrently in order to maximize the practical success rate of verification tools.While this is well-understood in safety verification, the current focus of liveness verification has been almost exclusively on the search for termination proofs. A counterexample to termination is an infinite programexecution. In this paper, we propose a method to search for such counterexamples. The search proceeds in two phases. We first dynamically enumerate lasso-shaped candidate paths for counterexamples, and then statically prove their feasibility. We illustrate the utility of our nontermination prover, called TNT, on several nontrivial examples, some of which require bit-level reasoning about integer representations."}],"day":"01","page":"147 - 158","title":"Proving non-termination","conference":{"name":"POPL: Principles of Programming Languages"},"date_updated":"2021-01-12T07:59:25Z","status":"public","date_created":"2018-12-11T12:09:17Z","date_published":"2008-01-01T00:00:00Z","main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/proving_non-termination.pdf"}],"citation":{"apa":"Gupta, A., Henzinger, T. A., Majumdar, R., Rybalchenko, A., &#38; Xu, R. (2008). Proving non-termination (pp. 147–158). Presented at the POPL: Principles of Programming Languages, ACM. <a href=\"https://doi.org/10.1145/1328438.1328459\">https://doi.org/10.1145/1328438.1328459</a>","ama":"Gupta A, Henzinger TA, Majumdar R, Rybalchenko A, Xu R. Proving non-termination. In: ACM; 2008:147-158. doi:<a href=\"https://doi.org/10.1145/1328438.1328459\">10.1145/1328438.1328459</a>","short":"A. Gupta, T.A. Henzinger, R. Majumdar, A. Rybalchenko, R. Xu, in:, ACM, 2008, pp. 147–158.","ieee":"A. Gupta, T. A. Henzinger, R. Majumdar, A. Rybalchenko, and R. Xu, “Proving non-termination,” presented at the POPL: Principles of Programming Languages, 2008, pp. 147–158.","mla":"Gupta, Ashutosh, et al. <i>Proving Non-Termination</i>. ACM, 2008, pp. 147–58, doi:<a href=\"https://doi.org/10.1145/1328438.1328459\">10.1145/1328438.1328459</a>.","ista":"Gupta A, Henzinger TA, Majumdar R, Rybalchenko A, Xu R. 2008. Proving non-termination. POPL: Principles of Programming Languages, 147–158.","chicago":"Gupta, Ashutosh, Thomas A Henzinger, Ritankar Majumdar, Andrey Rybalchenko, and Ru Xu. “Proving Non-Termination,” 147–58. ACM, 2008. <a href=\"https://doi.org/10.1145/1328438.1328459\">https://doi.org/10.1145/1328438.1328459</a>."},"year":"2008","month":"01","type":"conference"},{"author":[{"first_name":"Arkadeb","last_name":"Ghosal","full_name":"Ghosal, Arkadeb"}],"publication_status":"published","publisher":"University of California, Berkeley","publist_id":"199","_id":"4524","article_processing_charge":"No","user_id":"2DF688A6-F248-11E8-B48F-1D18A9856A87","acknowledgement":"978-0-549-83679-7","extern":"1","date_created":"2018-12-11T12:09:18Z","date_published":"2008-01-31T00:00:00Z","date_updated":"2021-01-12T07:59:26Z","status":"public","page":"1 - 210","title":"A hierarchical coordination language for reliable real-time tasks","abstract":[{"lang":"eng","text":"Complex requirements, time-to-market pressure and regulatory constraints have made the designing of embedded systems extremely challenging. This is evident by the increase in effort and expenditure for design of safety-driven real-time control-dominated applications like automotive and avionic controllers. Design processes are often challenged by lack of proper programming tools for specifying and verifying critical requirements (e.g. timing and reliability) of such applications. Platform based design, an approach for designing embedded systems, addresses the above concerns by separating requirement from architecture. The requirement specifies the intended behavior of an application while the architecture specifies the guarantees (e.g. execution speed, failure rate etc). An implementation, a mapping of the requirement on the architecture, is then analyzed for correctness. The orthogonalization of concerns makes the specification and analyses simpler. An effective use of such design methodology has been proposed in Logical Execution Time (LET) model of real-time tasks. The model separates the timing requirements (specified by release and termination instances of a task) from the architecture guarantees (specified by worst-case execution time of the task).\r\n\r\nThis dissertation proposes a coordination language, Hierarchical Timing Language (HTL), that captures the timing and reliability requirements of real-time applications. An implementation of the program on an architecture is then analyzed to check whether desired timing and reliability requirements are met or not. The core framework extends the LET model by accounting for reliability and refinement. The reliability model separates the reliability requirements of tasks from the reliability guarantees of the architecture. The requirement expresses the desired long-term reliability while the architecture provides a short-term reliability guarantee (e.g. failure rate for each iteration). The analysis checks if the short-term guarantee ensures the desired long-term reliability. The refinement model allows replacing a task by another task during program execution. Refinement preserves schedulability and reliability, i.e., if a refined task is schedulable and reliable for an implementation, then the refining task is also schedulable and reliable for the implementation. Refinement helps in concise specification without overloading analysis.\r\n\r\nThe work presents the formal model, the analyses (both with and without refinement), and a compiler for HTL programs. The compiler checks composition and refinement constraints, performs schedulability and reliability analyses, and generates code for implementation of an HTL program on a virtual machine. Three real-time controllers, one each from automatic control, automotive control and avionic control, are used to illustrate the steps in modeling and analyzing HTL programs."}],"day":"31","month":"01","type":"dissertation","supervisor":[{"full_name":"Sangiovanni-Vincentelli, Alberto","last_name":"Sangiovanni-Vincentelli","first_name":"Alberto"},{"id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000-0002-2985-7724","full_name":"Henzinger, Thomas A","last_name":"Henzinger","first_name":"Thomas A"},{"full_name":"Lee, Edward","last_name":"Lee","first_name":"Edward"},{"first_name":"Karl","last_name":"Hedrick","full_name":"Hedrick, Karl"}],"year":"2008","citation":{"ama":"Ghosal A. A hierarchical coordination language for reliable real-time tasks. 2008:1-210.","apa":"Ghosal, A. (2008). <i>A hierarchical coordination language for reliable real-time tasks</i>. University of California, Berkeley.","short":"A. Ghosal, A Hierarchical Coordination Language for Reliable Real-Time Tasks, University of California, Berkeley, 2008.","ieee":"A. Ghosal, “A hierarchical coordination language for reliable real-time tasks,” University of California, Berkeley, 2008.","mla":"Ghosal, Arkadeb. <i>A Hierarchical Coordination Language for Reliable Real-Time Tasks</i>. University of California, Berkeley, 2008, pp. 1–210.","ista":"Ghosal A. 2008. A hierarchical coordination language for reliable real-time tasks. University of California, Berkeley.","chicago":"Ghosal, Arkadeb. “A Hierarchical Coordination Language for Reliable Real-Time Tasks.” University of California, Berkeley, 2008."},"oa_version":"None","language":[{"iso":"eng"}]},{"citation":{"ama":"Fisher J, Henzinger TA, Mateescu M, Piterman N. Bounded asynchrony: Concurrency for modeling cell-cell interactions. In: Vol 5054. Springer; 2008:17-32. doi:<a href=\"https://doi.org/10.1007/978-3-540-68413-8_2\">10.1007/978-3-540-68413-8_2</a>","apa":"Fisher, J., Henzinger, T. A., Mateescu, M., &#38; Piterman, N. (2008). Bounded asynchrony: Concurrency for modeling cell-cell interactions (Vol. 5054, pp. 17–32). Presented at the FMSB: Formal Methods in Systems Biology, Springer. <a href=\"https://doi.org/10.1007/978-3-540-68413-8_2\">https://doi.org/10.1007/978-3-540-68413-8_2</a>","mla":"Fisher, Jasmin, et al. <i>Bounded Asynchrony: Concurrency for Modeling Cell-Cell Interactions</i>. Vol. 5054, Springer, 2008, pp. 17–32, doi:<a href=\"https://doi.org/10.1007/978-3-540-68413-8_2\">10.1007/978-3-540-68413-8_2</a>.","ieee":"J. Fisher, T. A. Henzinger, M. Mateescu, and N. Piterman, “Bounded asynchrony: Concurrency for modeling cell-cell interactions,” presented at the FMSB: Formal Methods in Systems Biology, 2008, vol. 5054, pp. 17–32.","short":"J. Fisher, T.A. Henzinger, M. Mateescu, N. Piterman, in:, Springer, 2008, pp. 17–32.","ista":"Fisher J, Henzinger TA, Mateescu M, Piterman N. 2008. Bounded asynchrony: Concurrency for modeling cell-cell interactions. FMSB: Formal Methods in Systems Biology, LNCS, vol. 5054, 17–32.","chicago":"Fisher, Jasmin, Thomas A Henzinger, Maria Mateescu, and Nir Piterman. “Bounded Asynchrony: Concurrency for Modeling Cell-Cell Interactions,” 5054:17–32. Springer, 2008. <a href=\"https://doi.org/10.1007/978-3-540-68413-8_2\">https://doi.org/10.1007/978-3-540-68413-8_2</a>."},"volume":5054,"year":"2008","month":"05","type":"conference","abstract":[{"text":"We introduce bounded asynchrony, a notion of concurrency tailored to the modeling of biological cell-cell interactions. Bounded asynchrony is the result of a scheduler that bounds the number of steps that one process gets ahead of other processes; this allows the components of a system to move independently while keeping them coupled. Bounded asynchrony accurately reproduces the experimental observations made about certain cell-cell interactions: its constrained nondeterminism captures the variability observed in cells that, although equally potent, assume distinct fates. Real-life cells are not “scheduled”, but we show that distributed real-time behavior can lead to component interactions that are observationally equivalent to bounded asynchrony; this provides a possible mechanistic explanation for the phenomena observed during cell fate specification.\nWe use model checking to determine cell fates. The nondeterminism of bounded asynchrony causes state explosion during model checking, but partial-order methods are not directly applicable. We present a new algorithm that reduces the number of states that need to be explored: our optimization takes advantage of the bounded-asynchronous progress and the spatially local interactions of components that model cells. We compare our own communication-based reduction with partial-order reduction (on a restricted form of bounded asynchrony) and experiments illustrate that our algorithm leads to significant savings.","lang":"eng"}],"day":"26","page":"17 - 32","conference":{"name":"FMSB: Formal Methods in Systems Biology"},"title":"Bounded asynchrony: Concurrency for modeling cell-cell interactions","status":"public","date_updated":"2021-01-12T07:59:27Z","date_created":"2018-12-11T12:09:19Z","main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/bounded_asynchrony.pdf"}],"date_published":"2008-05-26T00:00:00Z","extern":1,"intvolume":"      5054","quality_controlled":0,"_id":"4527","acknowledgement":"Supported in part by the Swiss National Science Foundation (grant 205321-111840).","publist_id":"196","doi":"10.1007/978-3-540-68413-8_2","publisher":"Springer","alternative_title":["LNCS"],"publication_status":"published","author":[{"full_name":"Fisher, Jasmin","first_name":"Jasmin","last_name":"Fisher"},{"last_name":"Henzinger","first_name":"Thomas A","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","full_name":"Thomas Henzinger","orcid":"0000−0002−2985−7724"},{"last_name":"Mateescu","first_name":"Maria","id":"3B43276C-F248-11E8-B48F-1D18A9856A87","full_name":"Maria Mateescu"},{"full_name":"Piterman, Nir","last_name":"Piterman","first_name":"Nir"}]},{"publisher":"World Scientific Publishing","publist_id":"192","doi":"10.1142/S0129054108005814 ","publication_status":"published","author":[{"full_name":"Doyen, Laurent","last_name":"Doyen","first_name":"Laurent"},{"id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724","full_name":"Thomas Henzinger","last_name":"Henzinger","first_name":"Thomas A"},{"full_name":"Raskin, Jean-François","first_name":"Jean","last_name":"Raskin"}],"_id":"4532","quality_controlled":0,"extern":1,"intvolume":"        19","page":"549 - 563","publication":"International Journal of Foundations of Computer Science","title":"Equivalence of labeled Markov chains","abstract":[{"text":"We consider the equivalence problem for labeled Markov chains (LMCs), where each state is labeled with an observation. Two LMCs are equivalent if every finite sequence of observations has the same probability of occurrence in the two LMCs. We show that equivalence can be decided in polynomial time, using a reduction to the equivalence problem for probabilistic automata, which is known to be solvable in polynomial time. We provide an alternative algorithm to solve the equivalence problem, which is based on a new definition of bisimulation for probabilistic automata. We also extend the technique to decide the equivalence of weighted probabilistic automata.","lang":"eng"}],"day":"01","date_created":"2018-12-11T12:09:20Z","issue":"3","date_published":"2008-06-01T00:00:00Z","main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/equivalence_of_labeled_markov_chains.pdf"}],"status":"public","date_updated":"2021-01-12T07:59:30Z","citation":{"short":"L. Doyen, T.A. Henzinger, J. Raskin, International Journal of Foundations of Computer Science 19 (2008) 549–563.","mla":"Doyen, Laurent, et al. “Equivalence of Labeled Markov Chains.” <i>International Journal of Foundations of Computer Science</i>, vol. 19, no. 3, World Scientific Publishing, 2008, pp. 549–63, doi:<a href=\"https://doi.org/10.1142/S0129054108005814 \">10.1142/S0129054108005814 </a>.","ieee":"L. Doyen, T. A. Henzinger, and J. Raskin, “Equivalence of labeled Markov chains,” <i>International Journal of Foundations of Computer Science</i>, vol. 19, no. 3. World Scientific Publishing, pp. 549–563, 2008.","ama":"Doyen L, Henzinger TA, Raskin J. Equivalence of labeled Markov chains. <i>International Journal of Foundations of Computer Science</i>. 2008;19(3):549-563. doi:<a href=\"https://doi.org/10.1142/S0129054108005814 \">10.1142/S0129054108005814 </a>","apa":"Doyen, L., Henzinger, T. A., &#38; Raskin, J. (2008). Equivalence of labeled Markov chains. <i>International Journal of Foundations of Computer Science</i>. World Scientific Publishing. <a href=\"https://doi.org/10.1142/S0129054108005814 \">https://doi.org/10.1142/S0129054108005814 </a>","chicago":"Doyen, Laurent, Thomas A Henzinger, and Jean Raskin. “Equivalence of Labeled Markov Chains.” <i>International Journal of Foundations of Computer Science</i>. World Scientific Publishing, 2008. <a href=\"https://doi.org/10.1142/S0129054108005814 \">https://doi.org/10.1142/S0129054108005814 </a>.","ista":"Doyen L, Henzinger TA, Raskin J. 2008. Equivalence of labeled Markov chains. International Journal of Foundations of Computer Science. 19(3), 549–563."},"month":"06","type":"journal_article","volume":19,"year":"2008"},{"publisher":"ACM","doi":"10.1145/1450058.1450070","publist_id":"193","publication_status":"published","author":[{"last_name":"Doyen","first_name":"Laurent","full_name":"Doyen, Laurent"},{"full_name":"Thomas Henzinger","orcid":"0000−0002−2985−7724","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","first_name":"Thomas A","last_name":"Henzinger"},{"full_name":"Jobstmann, Barbara","last_name":"Jobstmann","first_name":"Barbara"},{"last_name":"Petrov","first_name":"Tatjana","id":"3D5811FC-F248-11E8-B48F-1D18A9856A87","full_name":"Tatjana Petrov","orcid":"0000-0002-9041-0905"}],"_id":"4533","quality_controlled":0,"extern":1,"conference":{"name":"EMSOFT: Embedded Software "},"title":"Interface theories with component reuse","page":"79 - 88","day":"01","abstract":[{"text":"Interface theories have been proposed to support incremental design and independent implementability. Incremental design means that the compatibility checking of interfaces can proceed for partial system descriptions, without knowing the interfaces of all components. Independent implementability means that compatible interfaces can be refined separately, maintaining compatibility. We show that these interface theories provide no formal support for component reuse, meaning that the same component cannot be used to implement several different interfaces in a design. We add a new operation to interface theories in order to support such reuse. For example, different interfaces for the same component may refer to different aspects such as functionality, timing, and power consumption. We give both stateless and stateful examples for interface theories with component reuse. To illustrate component reuse in interface-based design, we show how the stateful theory provides a natural framework for specifying and refining PCI bus clients.","lang":"eng"}],"main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/interface_theories_with_component_reuse.pdf"}],"date_published":"2008-10-01T00:00:00Z","date_created":"2018-12-11T12:09:21Z","date_updated":"2021-01-12T07:59:30Z","status":"public","citation":{"chicago":"Doyen, Laurent, Thomas A Henzinger, Barbara Jobstmann, and Tatjana Petrov. “Interface Theories with Component Reuse,” 79–88. ACM, 2008. <a href=\"https://doi.org/10.1145/1450058.1450070\">https://doi.org/10.1145/1450058.1450070</a>.","ista":"Doyen L, Henzinger TA, Jobstmann B, Petrov T. 2008. Interface theories with component reuse. EMSOFT: Embedded Software , 79–88.","mla":"Doyen, Laurent, et al. <i>Interface Theories with Component Reuse</i>. ACM, 2008, pp. 79–88, doi:<a href=\"https://doi.org/10.1145/1450058.1450070\">10.1145/1450058.1450070</a>.","ieee":"L. Doyen, T. A. Henzinger, B. Jobstmann, and T. Petrov, “Interface theories with component reuse,” presented at the EMSOFT: Embedded Software , 2008, pp. 79–88.","short":"L. Doyen, T.A. Henzinger, B. Jobstmann, T. Petrov, in:, ACM, 2008, pp. 79–88.","ama":"Doyen L, Henzinger TA, Jobstmann B, Petrov T. Interface theories with component reuse. In: ACM; 2008:79-88. doi:<a href=\"https://doi.org/10.1145/1450058.1450070\">10.1145/1450058.1450070</a>","apa":"Doyen, L., Henzinger, T. A., Jobstmann, B., &#38; Petrov, T. (2008). Interface theories with component reuse (pp. 79–88). Presented at the EMSOFT: Embedded Software , ACM. <a href=\"https://doi.org/10.1145/1450058.1450070\">https://doi.org/10.1145/1450058.1450070</a>"},"type":"conference","month":"10","year":"2008"},{"date_created":"2018-12-11T12:09:21Z","issue":"1","date_published":"2008-03-31T00:00:00Z","main_file_link":[{"url":"http://pub.ist.ac.at/%7Etah/Publications/reduction_of_stochastic_parity_to_stochastic_mean-payoff_games.pdf","open_access":"0"}],"status":"public","date_updated":"2021-01-12T07:59:30Z","page":"1 - 7","title":"Reduction of stochastic parity to stochastic mean-payoff games","publication":"Information Processing Letters","abstract":[{"lang":"eng","text":"A stochastic graph game is played by two players on a game graph with probabilistic transitions. We consider stochastic graph games with ω-regular winning conditions specified as parity objectives, and mean-payoff (or limit-average) objectives. These games lie in NP ∩ coNP. We present a polynomial-time Turing reduction of stochastic parity games to stochastic mean-payoff games."}],"day":"31","month":"03","type":"journal_article","year":"2008","volume":106,"citation":{"chicago":"Chatterjee, Krishnendu, and Thomas A Henzinger. “Reduction of Stochastic Parity to Stochastic Mean-Payoff Games.” <i>Information Processing Letters</i>. Elsevier, 2008. <a href=\"https://doi.org/10.1016/j.ipl.2007.08.035\">https://doi.org/10.1016/j.ipl.2007.08.035</a>.","ista":"Chatterjee K, Henzinger TA. 2008. Reduction of stochastic parity to stochastic mean-payoff games. Information Processing Letters. 106(1), 1–7.","short":"K. Chatterjee, T.A. Henzinger, Information Processing Letters 106 (2008) 1–7.","mla":"Chatterjee, Krishnendu, and Thomas A. Henzinger. “Reduction of Stochastic Parity to Stochastic Mean-Payoff Games.” <i>Information Processing Letters</i>, vol. 106, no. 1, Elsevier, 2008, pp. 1–7, doi:<a href=\"https://doi.org/10.1016/j.ipl.2007.08.035\">10.1016/j.ipl.2007.08.035</a>.","ieee":"K. Chatterjee and T. A. Henzinger, “Reduction of stochastic parity to stochastic mean-payoff games,” <i>Information Processing Letters</i>, vol. 106, no. 1. Elsevier, pp. 1–7, 2008.","apa":"Chatterjee, K., &#38; Henzinger, T. A. (2008). Reduction of stochastic parity to stochastic mean-payoff games. <i>Information Processing Letters</i>. Elsevier. <a href=\"https://doi.org/10.1016/j.ipl.2007.08.035\">https://doi.org/10.1016/j.ipl.2007.08.035</a>","ama":"Chatterjee K, Henzinger TA. Reduction of stochastic parity to stochastic mean-payoff games. <i>Information Processing Letters</i>. 2008;106(1):1-7. doi:<a href=\"https://doi.org/10.1016/j.ipl.2007.08.035\">10.1016/j.ipl.2007.08.035</a>"},"author":[{"orcid":"0000-0002-4561-241X","full_name":"Krishnendu Chatterjee","id":"2E5DCA20-F248-11E8-B48F-1D18A9856A87","first_name":"Krishnendu","last_name":"Chatterjee"},{"id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724","full_name":"Thomas Henzinger","last_name":"Henzinger","first_name":"Thomas A"}],"publication_status":"published","publisher":"Elsevier","publist_id":"188","doi":"10.1016/j.ipl.2007.08.035","quality_controlled":0,"_id":"4534","extern":1,"intvolume":"       106"},{"page":"909 - 914","title":"Logical reliability of interacting real-time tasks","conference":{"name":"DATE: Design, Automation and Test in Europe"},"abstract":[{"text":"We propose the notion of logical reliability for real-time program tasks that interact through periodically updated program variables. We describe a reliability analysis that checks if the given short-term (e.g., single-period) reliability of a program variable update in an implementation is sufficient to meet the logical reliability requirement (of the program variable) in the long run. We then present a notion of design by refinement where a task can be refined by another task that writes to program variables with less logical reliability. The resulting analysis can be combined with an incremental schedulability analysis for interacting real-time tasks proposed earlier for the Hierarchical Timing Language (HTL), a coordination language for distributed real-time systems. We implemented a logical-reliability-enhanced prototype of the compiler and runtime infrastructure for HTL.","lang":"eng"}],"day":"01","date_created":"2018-12-11T12:09:25Z","main_file_link":[{"url":"http://pub.ist.ac.at/%7Etah/Publications/logical_reliability_of_interacting_real-time_tasks.pdf","open_access":"0"}],"date_published":"2008-01-01T00:00:00Z","date_updated":"2021-01-12T07:59:36Z","status":"public","citation":{"ieee":"K. Chatterjee <i>et al.</i>, “Logical reliability of interacting real-time tasks,” presented at the DATE: Design, Automation and Test in Europe, 2008, pp. 909–914.","mla":"Chatterjee, Krishnendu, et al. <i>Logical Reliability of Interacting Real-Time Tasks</i>. IEEE, 2008, pp. 909–14, doi:<a href=\"https://doi.org/10.1145/1403375.1403595\">10.1145/1403375.1403595</a>.","short":"K. Chatterjee, A. Ghosal, T.A. Henzinger, D. Iercan, C. Kirsch, C. Pinello, A. Sangiovanni Vincentelli, in:, IEEE, 2008, pp. 909–914.","ama":"Chatterjee K, Ghosal A, Henzinger TA, et al. Logical reliability of interacting real-time tasks. In: IEEE; 2008:909-914. doi:<a href=\"https://doi.org/10.1145/1403375.1403595\">10.1145/1403375.1403595</a>","apa":"Chatterjee, K., Ghosal, A., Henzinger, T. A., Iercan, D., Kirsch, C., Pinello, C., &#38; Sangiovanni Vincentelli, A. (2008). Logical reliability of interacting real-time tasks (pp. 909–914). Presented at the DATE: Design, Automation and Test in Europe, IEEE. <a href=\"https://doi.org/10.1145/1403375.1403595\">https://doi.org/10.1145/1403375.1403595</a>","chicago":"Chatterjee, Krishnendu, Arkadeb Ghosal, Thomas A Henzinger, Daniel Iercan, Christoph Kirsch, Claudio Pinello, and Alberto Sangiovanni Vincentelli. “Logical Reliability of Interacting Real-Time Tasks,” 909–14. IEEE, 2008. <a href=\"https://doi.org/10.1145/1403375.1403595\">https://doi.org/10.1145/1403375.1403595</a>.","ista":"Chatterjee K, Ghosal A, Henzinger TA, Iercan D, Kirsch C, Pinello C, Sangiovanni Vincentelli A. 2008. Logical reliability of interacting real-time tasks. DATE: Design, Automation and Test in Europe, 909–914."},"month":"01","type":"conference","year":"2008","publisher":"IEEE","publist_id":"171","doi":"10.1145/1403375.1403595","publication_status":"published","author":[{"first_name":"Krishnendu","last_name":"Chatterjee","orcid":"0000-0002-4561-241X","full_name":"Krishnendu Chatterjee","id":"2E5DCA20-F248-11E8-B48F-1D18A9856A87"},{"full_name":"Ghosal, Arkadeb","first_name":"Arkadeb","last_name":"Ghosal"},{"first_name":"Thomas A","last_name":"Henzinger","full_name":"Thomas Henzinger","orcid":"0000−0002−2985−7724","id":"40876CD8-F248-11E8-B48F-1D18A9856A87"},{"first_name":"Daniel","last_name":"Iercan","full_name":"Iercan, Daniel"},{"first_name":"Christoph","last_name":"Kirsch","full_name":"Kirsch, Christoph M"},{"full_name":"Pinello, Claudio","first_name":"Claudio","last_name":"Pinello"},{"first_name":"Alberto","last_name":"Sangiovanni Vincentelli","full_name":"Sangiovanni-Vincentelli, Alberto"}],"quality_controlled":0,"_id":"4546","extern":1},{"_id":"4548","quality_controlled":0,"intvolume":"        37","extern":1,"publication_status":"published","author":[{"first_name":"Krishnendu","last_name":"Chatterjee","orcid":"0000-0002-4561-241X","full_name":"Krishnendu Chatterjee","id":"2E5DCA20-F248-11E8-B48F-1D18A9856A87"},{"last_name":"Majumdar","first_name":"Ritankar","full_name":"Majumdar, Ritankar S"},{"first_name":"Thomas A","last_name":"Henzinger","orcid":"0000−0002−2985−7724","full_name":"Thomas Henzinger","id":"40876CD8-F248-11E8-B48F-1D18A9856A87"}],"publisher":"Springer","doi":"10.1007/s00182-007-0110-5","publist_id":"168","type":"journal_article","month":"01","year":"2008","volume":37,"citation":{"chicago":"Chatterjee, Krishnendu, Ritankar Majumdar, and Thomas A Henzinger. “Stochastic Limit-Average Games Are in EXPTIME.” <i>International Journal of Game Theory</i>. Springer, 2008. <a href=\"https://doi.org/10.1007/s00182-007-0110-5\">https://doi.org/10.1007/s00182-007-0110-5</a>.","ista":"Chatterjee K, Majumdar R, Henzinger TA. 2008. Stochastic limit-average games are in EXPTIME. International Journal of Game Theory. 37(2), 219–234.","mla":"Chatterjee, Krishnendu, et al. “Stochastic Limit-Average Games Are in EXPTIME.” <i>International Journal of Game Theory</i>, vol. 37, no. 2, Springer, 2008, pp. 219–34, doi:<a href=\"https://doi.org/10.1007/s00182-007-0110-5\">10.1007/s00182-007-0110-5</a>.","ieee":"K. Chatterjee, R. Majumdar, and T. A. Henzinger, “Stochastic limit-average games are in EXPTIME,” <i>International Journal of Game Theory</i>, vol. 37, no. 2. Springer, pp. 219–234, 2008.","short":"K. Chatterjee, R. Majumdar, T.A. Henzinger, International Journal of Game Theory 37 (2008) 219–234.","ama":"Chatterjee K, Majumdar R, Henzinger TA. Stochastic limit-average games are in EXPTIME. <i>International Journal of Game Theory</i>. 2008;37(2):219-234. doi:<a href=\"https://doi.org/10.1007/s00182-007-0110-5\">10.1007/s00182-007-0110-5</a>","apa":"Chatterjee, K., Majumdar, R., &#38; Henzinger, T. A. (2008). Stochastic limit-average games are in EXPTIME. <i>International Journal of Game Theory</i>. Springer. <a href=\"https://doi.org/10.1007/s00182-007-0110-5\">https://doi.org/10.1007/s00182-007-0110-5</a>"},"main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/stochastic_limit-average_games_are_in_exptime.pdf"}],"date_published":"2008-01-01T00:00:00Z","date_created":"2018-12-11T12:09:25Z","issue":"2","date_updated":"2021-01-12T07:59:37Z","status":"public","title":"Stochastic limit-average games are in EXPTIME","publication":"International Journal of Game Theory","page":"219 - 234","day":"01","abstract":[{"text":"The value of a finite-state two-player zero-sum stochastic game with limit-average payoff can be approximated to within ε in time exponential in a polynomial in the size of the game times polynomial in logarithmic in 1/ε, for all ε &gt; 0.","lang":"eng"}]},{"extern":1,"quality_controlled":0,"_id":"4568","author":[{"last_name":"Beyer","first_name":"Dirk","full_name":"Beyer, Dirk"},{"last_name":"Henzinger","first_name":"Thomas A","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724","full_name":"Thomas Henzinger"},{"first_name":"Grégory","last_name":"Théoduloz","full_name":"Théoduloz, Grégory"}],"publication_status":"published","doi":"10.1109/ASE.2008.13","publist_id":"140","publisher":"ACM","year":"2008","type":"conference","month":"10","citation":{"chicago":"Beyer, Dirk, Thomas A Henzinger, and Grégory Théoduloz. “Program Analysis with Dynamic Change of Precision,” 29–38. ACM, 2008. <a href=\"https://doi.org/10.1109/ASE.2008.13\">https://doi.org/10.1109/ASE.2008.13</a>.","ista":"Beyer D, Henzinger TA, Théoduloz G. 2008. Program analysis with dynamic change of precision. ASE: Automated Software Engineering, 29–38.","short":"D. Beyer, T.A. Henzinger, G. Théoduloz, in:, ACM, 2008, pp. 29–38.","mla":"Beyer, Dirk, et al. <i>Program Analysis with Dynamic Change of Precision</i>. ACM, 2008, pp. 29–38, doi:<a href=\"https://doi.org/10.1109/ASE.2008.13\">10.1109/ASE.2008.13</a>.","ieee":"D. Beyer, T. A. Henzinger, and G. Théoduloz, “Program analysis with dynamic change of precision,” presented at the ASE: Automated Software Engineering, 2008, pp. 29–38.","ama":"Beyer D, Henzinger TA, Théoduloz G. Program analysis with dynamic change of precision. In: ACM; 2008:29-38. doi:<a href=\"https://doi.org/10.1109/ASE.2008.13\">10.1109/ASE.2008.13</a>","apa":"Beyer, D., Henzinger, T. A., &#38; Théoduloz, G. (2008). Program analysis with dynamic change of precision (pp. 29–38). Presented at the ASE: Automated Software Engineering, ACM. <a href=\"https://doi.org/10.1109/ASE.2008.13\">https://doi.org/10.1109/ASE.2008.13</a>"},"status":"public","date_updated":"2021-01-12T07:59:46Z","main_file_link":[{"open_access":"0","url":"http://pub.ist.ac.at/%7Etah/Publications/program_analysis_with_dynamic_change_of_precision.pdf"}],"date_published":"2008-10-07T00:00:00Z","date_created":"2018-12-11T12:09:31Z","day":"07","abstract":[{"lang":"eng","text":"We present and evaluate a framework and tool for combining multiple program analyses which allows the dynamic (on-line) adjustment of the precision of each analysis depending on the accumulated results. For example, the explicit tracking of the values of a variable may be switched off in favor of a predicate abstraction when and where the number of different variable values that have been encountered has exceeded a specified threshold. The method is evaluated on verifying the SSH client/server software and shows significant gains compared with predicate abstraction-based model checking."}],"conference":{"name":"ASE: Automated Software Engineering"},"title":"Program analysis with dynamic change of precision","page":"29 - 38"},{"publication":"Genetics Research","title":"Identity and coalescence in structured populations: A commentary on 'Inbreeding coefficients and coalescence times' by Montgomery Slatkin","page":"475 - 477","day":"29","date_published":"2008-10-29T00:00:00Z","issue":"5-6","date_created":"2018-12-11T11:46:55Z","date_updated":"2024-02-14T09:51:09Z","status":"public","oa_version":"None","citation":{"ama":"Barton NH. Identity and coalescence in structured populations: A commentary on “Inbreeding coefficients and coalescence times” by Montgomery Slatkin. <i>Genetics Research</i>. 2008;89(5-6):475-477. doi:<a href=\"https://doi.org/10.1017/S0016672308009683\">10.1017/S0016672308009683</a>","apa":"Barton, N. H. (2008). Identity and coalescence in structured populations: A commentary on “Inbreeding coefficients and coalescence times” by Montgomery Slatkin. <i>Genetics Research</i>. Cambridge University Press. <a href=\"https://doi.org/10.1017/S0016672308009683\">https://doi.org/10.1017/S0016672308009683</a>","ieee":"N. H. Barton, “Identity and coalescence in structured populations: A commentary on ‘Inbreeding coefficients and coalescence times’ by Montgomery Slatkin,” <i>Genetics Research</i>, vol. 89, no. 5–6. Cambridge University Press, pp. 475–477, 2008.","mla":"Barton, Nicholas H. “Identity and Coalescence in Structured Populations: A Commentary on ‘Inbreeding Coefficients and Coalescence Times’ by Montgomery Slatkin.” <i>Genetics Research</i>, vol. 89, no. 5–6, Cambridge University Press, 2008, pp. 475–77, doi:<a href=\"https://doi.org/10.1017/S0016672308009683\">10.1017/S0016672308009683</a>.","short":"N.H. Barton, Genetics Research 89 (2008) 475–477.","ista":"Barton NH. 2008. Identity and coalescence in structured populations: A commentary on ‘Inbreeding coefficients and coalescence times’ by Montgomery Slatkin. Genetics Research. 89(5–6), 475–477.","chicago":"Barton, Nicholas H. “Identity and Coalescence in Structured Populations: A Commentary on ‘Inbreeding Coefficients and Coalescence Times’ by Montgomery Slatkin.” <i>Genetics Research</i>. Cambridge University Press, 2008. <a href=\"https://doi.org/10.1017/S0016672308009683\">https://doi.org/10.1017/S0016672308009683</a>."},"language":[{"iso":"eng"}],"type":"journal_article","month":"10","scopus_import":"1","year":"2008","volume":89,"publisher":"Cambridge University Press","doi":"10.1017/S0016672308009683","publist_id":"7302","author":[{"id":"4880FE40-F248-11E8-B48F-1D18A9856A87","full_name":"Barton, Nicholas H","orcid":"0000-0002-8548-5240","last_name":"Barton","first_name":"Nicholas H"}],"publication_status":"published","department":[{"_id":"NiBa"}],"user_id":"2DF688A6-F248-11E8-B48F-1D18A9856A87","_id":"517","quality_controlled":"1","article_processing_charge":"No","intvolume":"        89"},{"language":[{"iso":"eng"}],"article_type":"original","month":"10","page":"503-510","publication":"Trends in Genetics","date_created":"2023-01-16T09:22:44Z","status":"public","quality_controlled":"1","article_processing_charge":"No","acknowledgement":"X.F. holds a Clarendon Scholarship from the University of Oxford. We thank Angela Hay and Jill Harrison for helpful advice and discussion.","intvolume":"        23","external_id":{"pmid":["17825943"]},"citation":{"mla":"Feng, Xiaoqi, and Hugh G. Dickinson. “Packaging the Male Germline in Plants.” <i>Trends in Genetics</i>, vol. 23, no. 10, Elsevier BV, 2007, pp. 503–10, doi:<a href=\"https://doi.org/10.1016/j.tig.2007.08.005\">10.1016/j.tig.2007.08.005</a>.","ieee":"X. Feng and H. G. Dickinson, “Packaging the male germline in plants,” <i>Trends in Genetics</i>, vol. 23, no. 10. Elsevier BV, pp. 503–510, 2007.","short":"X. Feng, H.G. Dickinson, Trends in Genetics 23 (2007) 503–510.","apa":"Feng, X., &#38; Dickinson, H. G. (2007). Packaging the male germline in plants. <i>Trends in Genetics</i>. Elsevier BV. <a href=\"https://doi.org/10.1016/j.tig.2007.08.005\">https://doi.org/10.1016/j.tig.2007.08.005</a>","ama":"Feng X, Dickinson HG. Packaging the male germline in plants. <i>Trends in Genetics</i>. 2007;23(10):503-510. doi:<a href=\"https://doi.org/10.1016/j.tig.2007.08.005\">10.1016/j.tig.2007.08.005</a>","chicago":"Feng, Xiaoqi, and Hugh G. Dickinson. “Packaging the Male Germline in Plants.” <i>Trends in Genetics</i>. Elsevier BV, 2007. <a href=\"https://doi.org/10.1016/j.tig.2007.08.005\">https://doi.org/10.1016/j.tig.2007.08.005</a>.","ista":"Feng X, Dickinson HG. 2007. Packaging the male germline in plants. Trends in Genetics. 23(10), 503–510."},"oa_version":"None","keyword":["Genetics"],"publication_identifier":{"issn":["0168-9525"]},"type":"journal_article","volume":23,"year":"2007","scopus_import":"1","title":"Packaging the male germline in plants","abstract":[{"text":"The development of plant lateral organs is interesting because, although many of the same genes seem to be involved in the early growth of primordia, completely different gene combinations are required for the complete development of organs such as leaves and stamens. Thus, the genes common to the development of most organs, which generally form and polarize the primordial ‘envelope’, must at some stage interact with those that ‘install’ the functional content of the organ – in the case of the stamen, the four microsporangia. Although distinct genetic pathways of organ initiation, polarity establishment and setting up the reproductive cell line can readily be recognized, they do not occur sequentially. Rather, they are activated early and run in parallel. There is evidence for continuing crosstalk between these pathways.","lang":"eng"}],"issue":"10","date_published":"2007-10-01T00:00:00Z","date_updated":"2023-05-08T10:58:47Z","_id":"12201","user_id":"2DF688A6-F248-11E8-B48F-1D18A9856A87","extern":"1","pmid":1,"publisher":"Elsevier BV","doi":"10.1016/j.tig.2007.08.005","publication_status":"published","author":[{"id":"e0164712-22ee-11ed-b12a-d80fcdf35958","full_name":"Feng, Xiaoqi","orcid":"0000-0002-4008-1234","last_name":"Feng","first_name":"Xiaoqi"},{"first_name":"Hugh G.","last_name":"Dickinson","full_name":"Dickinson, Hugh G."}],"department":[{"_id":"XiFe"}]},{"date_created":"2018-12-11T11:44:46Z","status":"public","publication":"Review of Scientific Instruments","day":"29","month":"10","language":[{"iso":"eng"}],"oa":1,"external_id":{"arxiv":["0708.0014"]},"publist_id":"7925","acknowledgement":"National Science Foundation\r\nThis work was supported with NSF Grant No. PHY-0653623. We thank Dr. W. Bickel and Dr. J. Jones for diagnostic equipment, K. Guerin for assistance with mechanical drawings, and M. Parker of Rincon Research Inc. for optics components.","quality_controlled":"1","intvolume":"        78","date_published":"2007-10-29T00:00:00Z","main_file_link":[{"open_access":"1","url":"https://arxiv.org/abs/0708.0014"}],"issue":"10","date_updated":"2021-01-12T06:49:35Z","title":"Cover slip external cavity diode laser","article_number":"106108","abstract":[{"text":"A 671 nm diode laser with a mode-hop-free tuning range of 40 GHz is described. This long tuning range is achieved by simultaneously ramping the external cavity length with the laser injection current. The laser output pointing remains fixed, independent of its frequency because of the cover slip cavity design. This system is simple, economical, robust, and easy to use for spectroscopy, as we demonstrate with lithium vapor and lithium atom beam experiments. ","lang":"eng"}],"type":"journal_article","year":"2007","volume":78,"oa_version":"Preprint","citation":{"ista":"Carr A, Serchest Y, Waitukaitis SR, Perreault J, Lonij V, Cronin A. 2007. Cover slip external cavity diode laser. Review of Scientific Instruments. 78(10), 106108.","chicago":"Carr, Adra, Yancey Serchest, Scott R Waitukaitis, John Perreault, Vincent Lonij, and Alexander Cronin. “Cover Slip External Cavity Diode Laser.” <i>Review of Scientific Instruments</i>. American Institute of Physics, 2007. <a href=\"https://doi.org/10.1063/1.2801006\">https://doi.org/10.1063/1.2801006</a>.","ama":"Carr A, Serchest Y, Waitukaitis SR, Perreault J, Lonij V, Cronin A. Cover slip external cavity diode laser. <i>Review of Scientific Instruments</i>. 2007;78(10). doi:<a href=\"https://doi.org/10.1063/1.2801006\">10.1063/1.2801006</a>","apa":"Carr, A., Serchest, Y., Waitukaitis, S. R., Perreault, J., Lonij, V., &#38; Cronin, A. (2007). Cover slip external cavity diode laser. <i>Review of Scientific Instruments</i>. American Institute of Physics. <a href=\"https://doi.org/10.1063/1.2801006\">https://doi.org/10.1063/1.2801006</a>","mla":"Carr, Adra, et al. “Cover Slip External Cavity Diode Laser.” <i>Review of Scientific Instruments</i>, vol. 78, no. 10, 106108, American Institute of Physics, 2007, doi:<a href=\"https://doi.org/10.1063/1.2801006\">10.1063/1.2801006</a>.","ieee":"A. Carr, Y. Serchest, S. R. Waitukaitis, J. Perreault, V. Lonij, and A. Cronin, “Cover slip external cavity diode laser,” <i>Review of Scientific Instruments</i>, vol. 78, no. 10. American Institute of Physics, 2007.","short":"A. Carr, Y. Serchest, S.R. Waitukaitis, J. Perreault, V. Lonij, A. Cronin, Review of Scientific Instruments 78 (2007)."},"publication_status":"published","author":[{"first_name":"Adra","last_name":"Carr","full_name":"Carr, Adra"},{"full_name":"Serchest, Yancey","last_name":"Serchest","first_name":"Yancey"},{"first_name":"Scott R","last_name":"Waitukaitis","orcid":"0000-0002-2299-3176","full_name":"Waitukaitis, Scott R","id":"3A1FFC16-F248-11E8-B48F-1D18A9856A87"},{"full_name":"Perreault, John","last_name":"Perreault","first_name":"John"},{"last_name":"Lonij","first_name":"Vincent","full_name":"Lonij, Vincent"},{"first_name":"Alexander","last_name":"Cronin","full_name":"Cronin, Alexander"}],"arxiv":1,"publisher":"American Institute of Physics","doi":"10.1063/1.2801006","user_id":"2DF688A6-F248-11E8-B48F-1D18A9856A87","_id":"128","extern":"1"}]