@inproceedings{4413, abstract = {An essential problem in component-based design is how to compose components designed in isolation. Several approaches have been proposed for specifying component interfaces that capture behavioral aspects such as interaction protocols, and for verifying interface compatibility. Likewise, several approaches have been developed for synthesizing converters between incompatible protocols. In this paper, we introduce the notion of adaptability as the property that two interfaces have when they can be made compatible by communicating through a converter that meets specified requirements. We show that verifying adaptability and synthesizing an appropriate converter are two faces of the same coin: adaptability can be formalized and solved using a game-theoretic framework, and then the converter can be synthesized as a strategy that always wins the game. Finally we show that this framework can be related to the rectification problem in trace theory.}, author = {Passerone, Roberto and De Alfaro, Luca and Henzinger, Thomas A and Sangiovanni Vincentelli, Alberto}, booktitle = {Proceedings of the 11th IEEE/ACM international conference on Computer-aided design}, isbn = {9780780376076}, location = {San Jose, CA, USA}, pages = {132 -- 139}, publisher = {IEEE}, title = {{Convertibility verification and converter synthesis: Two faces of the same coin}}, doi = {10.1145/774572.774592}, year = {2002}, } @phdthesis{4414, abstract = {This dissertation investigates game-theoretic approaches to the algorithmic analysis of concurrent, reactive systems. A concurrent system comprises a number of components working concurrently; a reactive system maintains an ongoing interaction with its environment. Traditional approaches to the formal analysis of concurrent reactive systems usually view the system as an unstructured state-transition graphs; instead, we view them as collections of interacting components, where each one is an open system which accepts inputs from the other components. The interactions among the components are naturally modeled as games. Adopting this game-theoretic view, we study three related problems pertaining to the verification and synthesis of systems. Firstly, we propose two novel game-theoretic techniques for the model-checking of concurrent reactive systems, and improve the performance of model-checking. The first technique discovers an error as soon as it cannot be prevented, which can be long before it actually occurs. This technique is based on the key observation that "unpreventability" is a local property to a module: an error is unpreventable in a module state if no environment can prevent it. The second technique attempts to decompose a model-checking proof into smaller proof obligations by constructing abstract modules automatically, using reachability and "unpreventability" information about the concrete modules. Three increasingly powerful proof decomposition rules are proposed and we show that in practice, the resulting abstract modules are often significantly smaller than the concrete modules and can drastically reduce the space and time requirements for verification. Both techniques fall into the category of compositional reasoning. Secondly, we investigate the composition and control of synchronous systems. An essential property of synchronous systems for compositional reasoning is non-blocking. In the composition of synchronous systems, however, due to circular causal dependency of input and output signals, non-blocking is not always guaranteed. Blocking compositions of systems can be ruled out semantically, by insisting on the existence of certain fixed points, or syntactically, by equipping systems with types, which make the dependencies between input and output signals transparent. We characterize various typing mechanisms in game-theoretic terms, and study their effects on the controller synthesis problem. We show that our typing systems are general enough to capture interesting real-life synchronous systems such as all delay-insensitive digital circuits. We then study their corresponding single-step control problems --a restricted form of controller synthesis problem whose solutions can be iterated in appropriate manners to solve all LTL controller synthesis problems. We also consider versions of the controller synthesis problem in which the type of the controller is given. We show that the solution of these fixed-type control problems requires the evaluation of partially ordered (Henkin) quantifiers on boolean formulas, and is therefore harder (nondeterministic exponential time) than more traditional control questions. Thirdly, we study the synthesis of a class of open systems, namely, uninitialized state machines. The sequential synthesis problem, which is closely related to Church's solvability problem, asks, given a specification in the form of a binary relation between input and output streams, for the construction of a finite-state stream transducer that converts inputs to appropriate outputs. For efficiency reasons, practical sequential hardware is often designed to operate without prior initialization. Such hardware designs can be modeled by uninitialized state machines, which are required to satisfy their specification if started from any state. We solve the sequential synthesis problem for uninitialized systems, that is, we construct uninitialized finite-state stream transducers. We consider specifications given by LTL formulas, deterministic, nondeterministic, universal, and alternating Buechi automata. We solve this uninitialized synthesis problem by reducing it to the well-understood initialized synthesis problem. While our solution is straightforward, it leads, for some specification formalisms, to upper bounds that are exponentially worse than the complexity of the corresponding initialized problems. However, we prove lower bounds to show that our simple solutions are optimal for all considered specification formalisms. The lower bound proofs require nontrivial generic reductions.}, author = {Mang, Freddy}, pages = {1 -- 116}, publisher = {University of California, Berkeley}, title = {{Games in open systems verification and synthesis}}, year = {2002}, } @inproceedings{4421, abstract = {We demonstrate the feasibility and benefits of Giotto-based control software development by reimplementing the autopilot system of an autonomously flying model helicopter. Giotto offers a clean separation between the platform-independent concerns of software functionality and I/O timing, and the platform-dependent concerns of software scheduling and execution. Functionality code such as code computing control laws can be generated automatically from Simulink models or, as in the case of this project, inherited from a legacy system. I/O timing code is generated automatically from Giotto models that specify real-time requirements such as task frequencies and actuator update rates. We extend Simulink to support the design of Giotto models, and from these models, the automatic generation of Giotto code that supervises the interaction of the functionality code with the physical environment. The Giotto compiler performs a schedulability analysis on the Giotto code, and generates timing code for the helicopter platform. The Giotto methodology guarantees the stringent hard real-time requirements of the autopilot system, and at the same time supports the automation of the software development process in a way that produces a transparent software architecture with predictable behavior and reusable components.}, author = {Kirsch, Christoph and Sanvido, Marco and Henzinger, Thomas A and Pree, Wolfgang}, booktitle = {Proceedings of the 2nd International Conference on Embedded Software}, isbn = {9783540443070}, location = {Grenoble, France}, pages = {46 -- 60}, publisher = {ACM}, title = {{A Giotto-based helicopter control system}}, doi = {10.1007/3-540-45828-X_5}, volume = {2491}, year = {2002}, } @inproceedings{4422, abstract = {Behavioral properties of open systems can be formalized as objectives in two-player games. Turn-based games model asynchronous interaction between the players (the system and its environment) by interleaving their moves. Concurrent games model synchronous interaction: the players always move simultaneously. Infinitary winning criteria are considered: Büchi, co-Büchi, and more general parity conditions. A generalization of determinacy for parity games to concurrent parity games demands probabilistic (mixed) strategies: either player 1 has a mixed strategy to win with probability 1 (almost-sure winning), or player 2 has a mixed strategy to win with positive probability. This work provides efficient reductions of concurrent probabilistic Büchi and co-Büchi games to turn-based games with Büchi condition and parity winning condition with three priorities, respectively. From a theoretical point of view, the latter reduction shows that one can trade the probabilistic nature of almost-sure winning for a more general parity (fairness) condition. The reductions improve understanding of concurrent games and provide an alternative simple proof of determinacy of concurrent Büchi and co-Büchi games. From a practical point of view, the reductions turn solvers of turn-based games into solvers of concurrent probabilistic games. Thus improvements in the well-studied algorithms for the former carry over immediately to the latter. In particular, a recent improvement in the complexity of solving turn-based parity games yields an improvement in time complexity of solving concurrent probabilistic co-Büchi games from cubic to quadratic.}, author = {Jurdziński, Marcin and Kupferman, Orna and Henzinger, Thomas A}, booktitle = {Proceedings of the 16th International Workshop on Computer Science Logic}, isbn = {9783540442400}, location = {Edinburgh, Scotland}, pages = {292 -- 305}, publisher = {Springer}, title = {{Trading probability for fairness}}, doi = {10.1007/3-540-45793-3_20}, volume = {2471}, year = {2002}, } @inproceedings{4423, abstract = {Automation control systems typically incorporate legacy code and components that were originally designed to operate independently. Furthermore, they operate under stringent safety and timing constraints. Current design strategies deal with these requirements and characteristics with ad hoc approaches. In particular, when designing control laws, implementation constraints are often ignored or cursorily estimated. Indeed, costly redesigns are needed after a prototype of the control system is built due to missed timing constraints and subtle transient errors. In this paper, we use the concepts of platform-based design, and the Giotto programming language, to develop a methodology for the design of automation control systems that builds in modularity and correct-by-construction procedures. We illustrate our strategy by describing the (successful) application of the methodology to the design of a time-based control system for a rotorcraft Uninhabited Aerial Vehicle (UAV).}, author = {Horowitz, Benjamin and Liebman, Judith and Ma, Cedric and Koo, T John and Henzinger, Thomas A and Sangiovanni Vincentelli, Alberto and Sastry, Shankar}, booktitle = {Proceedings of the 15th Triennial World Congress of the International Federation of Automatic Control}, issn = {1474-6670}, location = {Barcelona, Spain}, number = {1}, publisher = {Elsevier}, title = {{Embedded software design and system integration for rotorcraft UAV using platforms}}, doi = {10.3182/20020721-6-ES-1901.01628}, volume = {15}, year = {2002}, } @inproceedings{4444, abstract = {The Embedded Machine is a virtual machine that mediates in real time the interaction between software processes and physical processes. It separates the compilation of embedded programs into two phases. The first, platform-independent compiler phase generates E code (code executed by the Embedded Machine), which supervises the timing ---not the scheduling--- of application tasks relative to external events, such as clock ticks and sensor interrupts. E~code is portable and exhibits, given an input behavior, predictable (i.e., deterministic) timing and output behavior. The second, platform-dependent compiler phase checks the time safety of the E code, that is, whether platform performance (determined by the hardware) and platform utilization (determined by the scheduler of the operating system) enable its timely execution. We have used the Embedded Machine to compile and execute high-performance control applications written in Giotto, such as the flight control system of an autonomous model helicopter.}, author = {Henzinger, Thomas A and Kirsch, Christoph}, booktitle = {Proceedings of the ACM SIGPLAN 2002 conference on Programming language design and implementation}, isbn = {9781581134636}, location = {Berlin, Germany}, pages = {315 -- 326}, publisher = {ACM}, title = {{The embedded machine: predictable, portable real-time code}}, doi = {10.1145/512529.512567}, year = {2002}, } @inproceedings{4470, abstract = {Giotto is a platform-independent language for specifying software for high-performance control applications. In this paper we present a new approach to the compilation of Giotto. Following this approach, the Giotto compiler generates code for a virtual machine, called the E machine, which can be ported to different platforms. The Giotto compiler also checks if the generated E code is time safe for a given platform, that is, if the platform offers sufficient performance to ensure that the E code is executed in a timely fashion that conforms with the Giotto semantics. Time-safety checking requires a schedulability analysis. We show that while for arbitrary E code, the analysis is exponential, for E code generated from typical Giotto programs, the analysis is polynomial. This supports our claim that Giotto identifies a useful fragment of embedded programs.}, author = {Henzinger, Thomas A and Kirsch, Christoph and Majumdar, Ritankar and Matic, Slobodan}, booktitle = {Proceedings of the 2nd International Conference on Embedded Software}, isbn = {9783540443070}, location = {Grenoble, France}, pages = {76 -- 92}, publisher = {ACM}, title = {{Time-safety checking for embedded programs}}, doi = {10.1007/3-540-45828-X_7}, volume = {2491}, year = {2002}, } @inproceedings{4471, abstract = {The sequential synthesis problem, which is closely related to Church’s solvability problem, asks, given a specification in the form of a binary relation between input and output streams, for the construction of a finite-state stream transducer that converts inputs to appropriate outputs. For efficiency reasons, practical sequential hardware is often designed to operate without prior initialization. Such hardware designs can be modeled by uninitialized state machines, which are required to satisfy their specification if started from any state. In this paper we solve the sequential synthesis problem for uninitialized systems, that is, we construct uninitialized finite-state stream transducers. We consider specifications given by LTL formulas, deterministic, nondeterministic, universal, and alternating Büchi automata. We solve this uninitialized synthesis problem by reducing it to the well-understood initialized synthesis problem. While our solution is straightforward, it leads, for some specification formalisms, to upper bounds that are exponentially worse than the complexity of the corresponding initialized problems. However, we prove lower bounds to show that our simple solutions are optimal for all considered specification formalisms. We also study the problem of deciding whether a given specification is uninitialized, that is, if its uninitialized and initialized synthesis problems coincide. We show that this problem has, for each specification formalism, the same complexity as the equivalence problem.}, author = {Henzinger, Thomas A and Krishnan, Sriram and Kupferman, Orna and Mang, Freddy}, booktitle = {Proceedings of the 29th International Colloquium on Automata, Languages and Programming}, isbn = {9783540438649}, location = {Malaga, Spain}, pages = {644 -- 656}, publisher = {Springer}, title = {{Synthesis of uninitialized systems}}, doi = {10.1007/3-540-45465-9_55}, volume = {2380}, year = {2002}, } @inproceedings{4472, abstract = {We present a methodology and tool for verifying and certifying systems code. The verification is based on the lazy-abstraction paradigm for intertwining the following three logical steps: construct a predicate abstraction from the code, model check the abstraction, and automatically refine the abstraction based on counterexample analysis. The certification is based on the proof-carrying code paradigm. Lazy abstraction enables the automatic construction of small proof certificates. The methodology is implemented in Blast, the Berkeley Lazy Abstraction Software verification Tool. We describe our experience applying Blast to Linux and Windows device drivers. Given the C code for a driver and for a temporal-safety monitor, Blast automatically generates an easily checkable correctness certificate if the driver satisfies the specification, and an error trace otherwise.}, author = {Henzinger, Thomas A and Necula, George and Jhala, Ranjit and Sutre, Grégoire and Majumdar, Ritankar and Weimer, Westley}, booktitle = {Proceedings of the 14th International Conference on Computer Aided Verification}, isbn = {9783540439974}, location = {Copenhagen, Denmark}, pages = {526 -- 538}, publisher = {Springer}, title = {{Temporal safety proofs for systems code}}, doi = {10.1007/3-540-45657-0_45}, volume = {2404}, year = {2002}, } @article{4473, abstract = {The simulation preorder on state transition systems is widely accepted as a useful notion of refinement, both in its own right and as an efficiently checkable sufficient condition for trace containment. For composite systems, due to the exponential explosion of the state space, there is a need for decomposing a simulation check of the form P ≤s Q, denoting "P is simulated by Q," into simpler simulation checks on the components of P and Q. We present an assume-guarantee rule that enables such a decomposition. To the best of our knowledge, this is the first assume-guarantee rule that applies to a refinement relation different from trace containment. Our rule is circular, and its soundness proof requires induction on trace trees. The proof is constructive: given simulation relations that witness the simulation preorder between corresponding components of P and Q, we provide a procedure for constructing a witness relation for P ≤s Q. We also extend our assume-guarantee rule to account for fairness constraints on transition systems.}, author = {Henzinger, Thomas A and Qadeer, Shaz and Rajamani, Sriram and Tasiran, Serdar}, issn = {0164-0925}, journal = {ACM Transactions on Programming Languages and Systems (TOPLAS)}, number = {1}, pages = {51 -- 64}, publisher = {ACM}, title = {{An assume-guarantee rule for checking simulation}}, doi = {10.1145/509705.509707}, volume = {24}, year = {2002}, } @article{4474, abstract = {The simulation preorder for labeled transition systems is defined locally, and operationally, as a game that relates states with their immediate successor states. Simulation enjoys many appealing properties. First, simulation has a denotational characterization: system S simulates system I iff every computation tree embedded in the unrolling of I can be embedded also in the unrolling of S. Second, simulation has a logical characterization: S simulates I iff every universal branching-time formula satisfied by S is satisfied also by I. It follows that simulation is a suitable notion of implementation, and it is the coarsest abstraction of a system that preserves universal branching-time properties. Third, based on its local definition, simulation between finite-state systems can be checked in polynomial time. Finally, simulation implies trace containment, which cannot be defined locally and requires polynomial space for verification. Hence simulation is widely used both in manual and in automatic verification. Liveness assumptions about transition systems are typically modeled using fairness constraints. Existing notions of simulation for fair transition systems, however, are not local, and as a result, many appealing properties of the simulation preorder are lost. We propose a new view of fair simulation by extending the local definition of simulation to account for fairness: system View the MathML sourcefairly simulates system View the MathML source iff in the simulation game, there is a strategy that matches with each fair computation of View the MathML source a fair computation of View the MathML source. Our definition enjoys a denotational characterization and has a logical characterization: View the MathML source fairly simulates View the MathML source iff every fair computation tree (whose infinite paths are fair) embedded in the unrolling of View the MathML source can be embedded also in the unrolling of View the MathML source or, equivalently, iff every Fair-∀AFMC formula satisfied by View the MathML source is satisfied also by View the MathML source (∀AFMC is the universal fragment of the alternation-free μ-calculus). The locality of the definition leads us to a polynomial-time algorithm for checking fair simulation for finite-state systems with weak and strong fairness constraints. Finally, fair simulation implies fair trace containment and is therefore useful as an efficiently computable local criterion for proving linear-time abstraction hierarchies of fair systems.}, author = {Henzinger, Thomas A and Kupferman, Orna and Rajamani, Sriram}, issn = {0890-5401}, journal = {Information and Computation}, number = {1}, pages = {64 -- 81}, publisher = {Elsevier}, title = {{Fair simulation}}, doi = {10.1006/inco.2001.3085}, volume = {173}, year = {2002}, } @inproceedings{4476, abstract = {One approach to model checking software is based on the abstract-check-refine paradigm: build an abstract model, then check the desired property, and if the check fails, refine the model and start over. We introduce the concept of lazy abstraction to integrate and optimize the three phases of the abstract-check-refine loop. Lazy abstraction continuously builds and refines a single abstract model on demand, driven by the model checker, so that different parts of the model may exhibit different degrees of precision, namely just enough to verify the desired property. We present an algorithm for model checking safety properties using lazy abstraction and describe an implementation of the algorithm applied to C programs. We also provide sufficient conditions for the termination of the method.}, author = {Henzinger, Thomas A and Jhala, Ranjit and Majumdar, Ritankar and Sutre, Grégoire}, booktitle = {Proceedings of the 29th ACM SIGPLAN-SIGACT symposium on Principles of programming languages}, isbn = {9781581134506}, location = {Portland, OR, USA}, pages = {58 -- 70}, publisher = {ACM}, title = {{Lazy abstraction}}, doi = {10.1145/503272.503279}, year = {2002}, } @inproceedings{4562, abstract = {We present interface models that describe both the input assumptions of a component, and its output behavior. By enabling us to check that the input assumptions of a component are met in a design, interface models provide a compatibility check for component-based design. When refining a design into an implementation, interface models require that the output behavior of a component satisfies the design specification only when the input assumptions of the specification are satisfied, yielding greater flexibility in the choice of implementations. Technically, our interface models are games between two players, Input and Output; the duality of the players accounts for the dual roles of inputs and outputs in composition and refinement. We present two interface models in detail, one for a simple synchronous form of interaction between components typical in hardware, and the other for more complex synchronous interactions on bidirectional connections. As an example, we specify the interface of a bidirectional bus, with the input assumption that at any time at most one component has write access to the bus. For these interface models, we present algorithms for compatibility and refinement checking, and we describe efficient symbolic implementations.}, author = {Chakrabarti, Arindam and De Alfaro, Luca and Henzinger, Thomas A and Mang, Freddy}, booktitle = {Proceedings of the 14th International Conference on Computer Aided Verification}, isbn = {9783540439974}, location = {Copenhagen, Denmark}, pages = {414 -- 427}, publisher = {Springer}, title = {{Synchronous and bidirectional component interfaces}}, doi = {10.1007/3-540-45657-0_34}, volume = {2404}, year = {2002}, } @inproceedings{4563, abstract = {We present a formal methodology and tool for uncovering errors in the interaction of software modules. Our methodology consists of a suite of languages for defining software interfaces, and algorithms for checking interface compatibility. We focus on interfaces that explain the method-call dependencies between software modules. Such an interface makes assumptions about the environment in the form of call and availability constraints. A call constraint restricts the accessibility of local methods to certain external methods. An availability constraint restricts the accessibility of local methods to certain states of the module. For example, the interface for a file server with local methods open and read may assert that a file cannot be read without having been opened. Checking interface compatibility requires the solution of games, and in the presence of availability constraints, of pushdown games. Based on this methodology, we have implemented a tool that has uncovered incompatibilities in TinyOS, a small operating system for sensor nodes in adhoc networks.}, author = {Chakrabarti, Arindam and De Alfaro, Luca and Henzinger, Thomas A and Jurdziński, Marcin and Mang, Freddy}, booktitle = {Proceedings of the 14th International Conference on Computer Aided Verification}, isbn = { 9783540439974}, location = {Copenhagen, Denmark}, pages = {428 -- 441}, publisher = {Springer}, title = {{Interface compatibility checking for software modules}}, doi = {10.1007/3-540-45657-0_35}, volume = {2404}, year = {2002}, } @inproceedings{4565, abstract = {In the literature, we find several formulations of the control problem for timed and hybrid systems. We argue that formulations where a controller can cause an action at any point in dense (rational or real) time are problematic, by presenting an example where the controller must act faster and faster, yet causes no Zeno effects (say, the control actions are at times 0, 1/2, 1, 1 1/4, 2, 2 1/8, 3, 3 1/16 ,...). Such a controller is, of course, not implementable in software. Such controllers are avoided by formulations where the controller can cause actions only at discrete (integer) points in time. While the resulting control problem is well- understood if the time unit, or “sampling rate” of the controller, is fixed a priori, we define a novel, stronger formulation: the discrete-time control problem with unknown sampling rate asks if a sampling controller exists for some sampling rate. We prove that this problem is undecidable even in the special case of timed automata.}, author = {Cassez, Franck and Henzinger, Thomas A and Raskin, Jean}, booktitle = {Proceedings of the 5th International Workshop on Hybrid Systems: Computation and Control}, isbn = {9783540433217}, location = {Stanford, CA, USA}, pages = {134 -- 148}, publisher = {Springer}, title = {{A comparison of control problems for timed and hybrid systems}}, doi = {10.1007/3-540-45873-5_13}, volume = {2289}, year = {2002}, } @article{4595, abstract = {Temporal logic comes in two varieties: linear-time temporal logic assumes implicit universal quantification over all paths that are generated by the execution of a system; branching-time temporal logic allows explicit existential and universal quantification over all paths. We introduce a third, more general variety of temporal logic: alternating-time temporal logic offers selective quantification over those paths that are possible outcomes of games, such as the game in which the system and the environment alternate moves. While linear-time and branching-time logics are natural specification languages for closed systems, alternating-time logics are natural specification languages for open systems. For example, by preceding the temporal operator "eventually" with a selective path quantifier, we can specify that in the game between the system and the environment, the system has a strategy to reach a certain state. The problems of receptiveness, realizability, and controllability can be formulated as model-checking problems for alternating-time formulas. Depending on whether or not we admit arbitrary nesting of selective path quantifiers and temporal operators, we obtain the two alternating-time temporal logics ATL and ATL*.ATL and ATL* are interpreted over concurrent game structures. Every state transition of a concurrent game structure results from a choice of moves, one for each player. The players represent individual components and the environment of an open system. Concurrent game structures can capture various forms of synchronous composition for open systems, and if augmented with fairness constraints, also asynchronous composition. Over structures without fairness constraints, the model-checking complexity of ATL is linear in the size of the game structure and length of the formula, and the symbolic model-checking algorithm for CTL extends with few modifications to ATL. Over structures with weak-fairness constraints, ATL model checking requires the solution of 1-pair Rabin games, and can be done in polynomial time. Over structures with strong-fairness constraints, ATL model checking requires the solution of games with Boolean combinations of Büchi conditions, and can be done in PSPACE. In the case of ATL*, the model-checking problem is closely related to the synthesis problem for linear-time formulas, and requires doubly exponential time.}, author = {Alur, Rajeev and Henzinger, Thomas A and Kupferman, Orna}, issn = {0004-5411}, journal = {Journal of the ACM}, number = {5}, pages = {672 -- 713}, publisher = {ACM}, title = {{Alternating-time temporal logic}}, doi = {10.1145/585265.585270}, volume = {49}, year = {2002}, } @inproceedings{4631, abstract = {We present a theory of timed interfaces, which is capable of specifying both the timing of the inputs a component expects from the environment, and the timing of the outputs it can produce. Two timed interfaces are compatible if there is a way to use them together such that their timing expectations are met. Our theory provides algorithms for checking the compatibility between two interfaces and for deriving the composite interface; the theory can thus be viewed as a type system for real-time interaction. Technically, a timed interface is encoded as a timed game between two players, representing the inputs and outputs of the component. The algorithms for compatibility checking and interface composition are thus derived from algorithms for solving timed games.}, author = {De Alfaro, Luca and Henzinger, Thomas A and Stoelinga, Mariëlle}, booktitle = {Proceedings of the 2nd International Conference on Embedded Software}, isbn = {9783540443070}, location = {Grenoble, France}, pages = {108 -- 122}, publisher = {ACM}, title = {{Timed interfaces}}, doi = {10.1007/3-540-45828-X_9}, volume = {2491}, year = {2002}, } @article{841, author = {Wolf, Yuri and Kondrashov, Fyodor and Koonin, Eugene}, issn = {0168-9479}, journal = {Trends in Genetics}, number = {9}, pages = {499 -- 501}, publisher = {Elsevier}, title = {{Footprints of primordial introns on the eukaryotic genome: still no clear traces }}, doi = {10.1016/S0168-9525(01)02376-9}, volume = {17}, year = {2001}, } @article{851, abstract = {The study and comparison of mutation(al) spectra is an important problem in molecular biology, because these spectra often reflect on important features of mutations and their fixation. Such features include the interaction of DNA with various mutagens, the function of repair/replication enzymes, and properties of target proteins. It is known that mutability varies significantly along nucleotide sequences, such that mutations often concentrate at certain positions, called "hotspots," in a sequence. In this paper, we discuss in detail two approaches for mutation spectra analysis: the comparison of mutation spectra with a HG-PUBL program, (FTP: sunsite.unc.edu/pub/academic/ biology/dna-mutations/hyperg) and hotspot prediction with the CLUSTERM program (www.itba.mi.cnr.it/webmutation; ftp.bionet.nsc.ru/pub/biology/dbms/clusterm.zip). Several other approaches for mutational spectra analysis, such as the analysis of a target protein structure, hotspot context revealing, multiple spectra comparisons, as well as a number of mutation databases are briefly described. Mutation spectra in the lacI gene of E. coli and the human p53 gene are used for illustration of various difficulties of such analysis.}, author = {Rogozin, Igor and Kondrashov, Fyodor and Glazko, Galina}, issn = {1059-7794}, journal = {Human Mutation}, number = {2}, pages = {83 -- 102}, publisher = {Wiley-Blackwell}, title = {{Use of mutation spectra analysis software}}, doi = {10.1002/1098-1004(200102)17:2<83::AID-HUMU1>3.0.CO;2-E}, volume = {17}, year = {2001}, } @article{8521, abstract = {We continue the previous article's discussion of bounds, for prevalent diffeomorphisms of smooth compact manifolds, on the growth of the number of periodic points and the decay of their hyperbolicity as a function of their period $n$. In that article we reduced the main results to a problem, for certain families of diffeomorphisms, of bounding the measure of parameter values for which the diffeomorphism has (for a given period $n$) an almost periodic point that is almost nonhyperbolic. We also formulated our results for $1$-dimensional endomorphisms on a compact interval. In this article we describe some of the main techniques involved and outline the rest of the proof. To simplify notation, we concentrate primarily on the $1$-dimensional case.}, author = {Kaloshin, Vadim and Hunt, Brian R.}, issn = {1079-6762}, journal = {Electronic Research Announcements of the American Mathematical Society}, keywords = {General Mathematics}, number = {5}, pages = {28--36}, publisher = {American Mathematical Society}, title = {{A stretched exponential bound on the rate of growth of the number of periodic points for prevalent diffeomorphisms II}}, doi = {10.1090/s1079-6762-01-00091-9}, volume = {7}, year = {2001}, }