_id,doi,title
14405,10.4230/LIPIcs.CONCUR.2023.21,Hypernode automata
10774,10.1007/978-3-030-94583-1_1,Flavors of sequential information flow
11355,10.1007/978-3-030-99429-7_1,Information-flow interfaces
10861,10.1007/s10009-020-00582-z,AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic
7232,10.1007/978-3-030-29662-9_4,Mixed-time signal temporal logic
6428,10.1145/3302504.3311800,Interface-aware signal temporal logic
299,10.1007/978-3-319-89963-3_18,AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic
5411,10.15479/AT:IST-2014-148-v2-1,Compositional specifications for IOCO testing
2942,10.1007/978-3-642-34059-8_20,Independent implementability of viewpoints
3155,10.1007/978-3-642-30793-5_13,Synchronous interface theories and time triggered scheduling
3162,10.1007/978-3-642-29860-8_12,Parametric identification of temporal properties
3362,10.1007/978-3-642-23217-6_27,Dynamic reactive modules
4369,10.1007/978-3-642-15297-9_13,From MTL to deterministic timed automata
4379,10.1007/s10703-009-0085-x,Analog property checkers: a DDR2 case study
4389,10.1109/ACSD.2010.26,Robustness of sequential circuits
4371,10.1007/978-3-540-78127-1_26,"Checking Temporal Properties of Discrete, Timed and Continuous Behaviors"
4368,1567,AMT: a property-based monitoring tool for analog systems
4370,1568,On synthesizing controllers from bounded-response properties
4373,1571,"Real Time Temporal Logic: Past, Present, Future"
4374,1570,From MITL to Timed Automata