---
_id: '12736'
abstract:
- lang: eng
text: Although a wide variety of handcrafted concurrent data structures have been
proposed, there is considerable interest in universal approaches (Universal Constructions
or UCs) for building concurrent data structures. UCs (semi-)automatically convert
a sequential data structure into a concurrent one. The simplest approach uses
locks [3, 6] that protect a sequential data structure and allow only one process
to access it at a time. However, the resulting data structure is blocking. Most
work on UCs instead focuses on obtaining non-blocking progress guarantees such
as obstruction-freedom, lock-freedom or wait-freedom. Many non-blocking UCs have
appeared. Key examples include the seminal wait-free UC [2] by Herlihy, a NUMA-aware
UC [10] by Yi et al., and an efficient UC for large objects [1] by Fatourou et
al.
acknowledgement: 'This work was supported by: the Natural Sciences and Engineering
Research Council of Canada (NSERC) Discovery Program grant: RGPIN-2019-04227, and
the Canada Foundation for Innovation John R. Evans Leaders Fund (CFI-JELF) with
equal support from the Ontario Research Fund CFI Leaders Opportunity Fund: 38512.'
article_processing_charge: No
author:
- first_name: Vitaly
full_name: Aksenov, Vitaly
last_name: Aksenov
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: Alexander
full_name: Fedorov, Alexander
id: 2e711909-896a-11ed-bdf8-eb0f5a2984c6
last_name: Fedorov
- first_name: Ilya
full_name: Kokorin, Ilya
last_name: Kokorin
citation:
ama: Aksenov V, Brown TA, Fedorov A, Kokorin I. Unexpected Scaling in Path Copying
Trees. Association for Computing Machinery; 2023:438-440. doi:10.1145/3572848.3577512
apa: 'Aksenov, V., Brown, T. A., Fedorov, A., & Kokorin, I. (2023). Unexpected
scaling in path copying trees. Proceedings of the ACM SIGPLAN Symposium
on Principles and Practice of Parallel Programming (pp. 438–440). Montreal,
QB, Canada: Association for Computing Machinery. https://doi.org/10.1145/3572848.3577512'
chicago: Aksenov, Vitaly, Trevor A Brown, Alexander Fedorov, and Ilya Kokorin. Unexpected
Scaling in Path Copying Trees. Proceedings of the ACM SIGPLAN Symposium
on Principles and Practice of Parallel Programming. Association for Computing
Machinery, 2023. https://doi.org/10.1145/3572848.3577512.
ieee: V. Aksenov, T. A. Brown, A. Fedorov, and I. Kokorin, Unexpected scaling
in path copying trees. Association for Computing Machinery, 2023, pp. 438–440.
ista: Aksenov V, Brown TA, Fedorov A, Kokorin I. 2023. Unexpected scaling in path
copying trees, Association for Computing Machinery,p.
mla: Aksenov, Vitaly, et al. “Unexpected Scaling in Path Copying Trees.” Proceedings
of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming,
Association for Computing Machinery, 2023, pp. 438–40, doi:10.1145/3572848.3577512.
short: V. Aksenov, T.A. Brown, A. Fedorov, I. Kokorin, Unexpected Scaling in Path
Copying Trees, Association for Computing Machinery, 2023.
conference:
end_date: 2023-03-01
location: Montreal, QB, Canada
name: 'PPoPP: Sympopsium on Principles and Practice of Parallel Programming'
start_date: 2023-02-25
date_created: 2023-03-19T23:00:58Z
date_published: 2023-02-25T00:00:00Z
date_updated: 2023-03-20T07:57:27Z
day: '25'
department:
- _id: DaAl
- _id: GradSch
doi: 10.1145/3572848.3577512
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://doi.org/10.1145/3572848.3577512
month: '02'
oa: 1
oa_version: Published Version
page: 438-440
publication: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of
Parallel Programming
publication_identifier:
isbn:
- '9798400700156'
publication_status: published
publisher: Association for Computing Machinery
quality_controlled: '1'
status: public
title: Unexpected scaling in path copying trees
type: conference_poster
user_id: 2DF688A6-F248-11E8-B48F-1D18A9856A87
year: '2023'
...
---
_id: '11181'
abstract:
- lang: eng
text: 'To maximize the performance of concurrent data structures, researchers have
often turned to highly complex fine-grained techniques, resulting in efficient
and elegant algorithms, which can however be often difficult to understand and
prove correct. While simpler techniques exist, such as transactional memory, they
can have limited performance or portability relative to their fine-grained counterparts.
Approaches at both ends of this complexity-performance spectrum have been extensively
explored, but relatively less is known about the middle ground: approaches that
are willing to sacrifice some performance for simplicity, while remaining competitive
with state-of-the-art handcrafted designs. In this paper, we explore this middle
ground, and present PathCAS, a primitive that combines ideas from multi-word CAS
(KCAS) and transactional memory approaches, while carefully avoiding overhead.
We show how PathCAS can be used to implement efficient search data structures
relatively simply, using an internal binary search tree as an example, then extending
this to an AVL tree. Our best implementations outperform many handcrafted search
trees: in search-heavy workloads, it rivals the BCCO tree [5], the fastest known
concurrent binary tree in terms of search performance [3]. Our results suggest
that PathCAS can yield concurrent data structures that are relatively easy to
build and prove correct, while offering surprisingly high performance.'
acknowledgement: "This work was supported by: the Natural Sciences and Engineering
Research Council of Canada (NSERC) Collaborative Research and Development grant:
CRDPJ 539431-19, the\r\nCanada Foundation for Innovation John R. Evans Leaders Fund
with equal support from the Ontario Research Fund CFI Leaders Opportunity Fund:
38512, Waterloo Huawei Joint Innovation Lab project “Scalable Infrastructure for
Next Generation Data Management Systems”, NSERC Discovery Launch Supplement: DGECR-2019-00048,
NSERC Discovery\r\nProgram under the grants: RGPIN-2019-04227 and RGPIN04512-2018,
and the University of Waterloo. We would also like to thank the reviewers for their
insightful comments."
article_processing_charge: No
author:
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: William
full_name: Sigouin, William
last_name: Sigouin
- first_name: Dan-Adrian
full_name: Alistarh, Dan-Adrian
id: 4A899BFC-F248-11E8-B48F-1D18A9856A87
last_name: Alistarh
orcid: 0000-0003-3650-940X
citation:
ama: 'Brown TA, Sigouin W, Alistarh D-A. PathCAS: An efficient middle ground for
concurrent search data structures. In: Proceedings of the 27th ACM SIGPLAN
Symposium on Principles and Practice of Parallel Programming. Association
for Computing Machinery; 2022:385-399. doi:10.1145/3503221.3508410'
apa: 'Brown, T. A., Sigouin, W., & Alistarh, D.-A. (2022). PathCAS: An efficient
middle ground for concurrent search data structures. In Proceedings of the
27th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
(pp. 385–399). Seoul, Republic of Korea: Association for Computing Machinery.
https://doi.org/10.1145/3503221.3508410'
chicago: 'Brown, Trevor A, William Sigouin, and Dan-Adrian Alistarh. “PathCAS: An
Efficient Middle Ground for Concurrent Search Data Structures.” In Proceedings
of the 27th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming,
385–99. Association for Computing Machinery, 2022. https://doi.org/10.1145/3503221.3508410.'
ieee: 'T. A. Brown, W. Sigouin, and D.-A. Alistarh, “PathCAS: An efficient middle
ground for concurrent search data structures,” in Proceedings of the 27th ACM
SIGPLAN Symposium on Principles and Practice of Parallel Programming, Seoul,
Republic of Korea, 2022, pp. 385–399.'
ista: 'Brown TA, Sigouin W, Alistarh D-A. 2022. PathCAS: An efficient middle ground
for concurrent search data structures. Proceedings of the 27th ACM SIGPLAN Symposium
on Principles and Practice of Parallel Programming. PPoPP: Sympopsium on Principles
and Practice of Parallel Programming, 385–399.'
mla: 'Brown, Trevor A., et al. “PathCAS: An Efficient Middle Ground for Concurrent
Search Data Structures.” Proceedings of the 27th ACM SIGPLAN Symposium on Principles
and Practice of Parallel Programming, Association for Computing Machinery,
2022, pp. 385–99, doi:10.1145/3503221.3508410.'
short: T.A. Brown, W. Sigouin, D.-A. Alistarh, in:, Proceedings of the 27th ACM
SIGPLAN Symposium on Principles and Practice of Parallel Programming, Association
for Computing Machinery, 2022, pp. 385–399.
conference:
end_date: 2022-04-06
location: Seoul, Republic of Korea
name: 'PPoPP: Sympopsium on Principles and Practice of Parallel Programming'
start_date: 2022-04-02
date_created: 2022-04-17T22:01:46Z
date_published: 2022-04-02T00:00:00Z
date_updated: 2023-08-03T06:49:20Z
day: '02'
ddc:
- '000'
department:
- _id: DaAl
doi: 10.1145/3503221.3508410
external_id:
isi:
- '000883318200027'
file:
- access_level: open_access
checksum: 8ceea411fa133795cd4903529498eb6b
content_type: application/pdf
creator: dernst
date_created: 2022-08-05T09:19:29Z
date_updated: 2022-08-05T09:19:29Z
file_id: '11731'
file_name: 2022_PPoPP_Brown.pdf
file_size: 1128343
relation: main_file
success: 1
file_date_updated: 2022-08-05T09:19:29Z
has_accepted_license: '1'
isi: 1
language:
- iso: eng
month: '04'
oa: 1
oa_version: Published Version
page: 385-399
publication: Proceedings of the 27th ACM SIGPLAN Symposium on Principles and Practice
of Parallel Programming
publication_identifier:
isbn:
- '9781450392044'
publication_status: published
publisher: Association for Computing Machinery
quality_controlled: '1'
scopus_import: '1'
status: public
title: 'PathCAS: An efficient middle ground for concurrent search data structures'
tmp:
image: /images/cc_by.png
legal_code_url: https://creativecommons.org/licenses/by/4.0/legalcode
name: Creative Commons Attribution 4.0 International Public License (CC-BY 4.0)
short: CC BY (4.0)
type: conference
user_id: 4359f0d1-fa6c-11eb-b949-802e58b17ae8
year: '2022'
...
---
_id: '8191'
abstract:
- lang: eng
text: "There has been a significant amount of research on hardware and software
support for efficient concurrent data structures; yet, the question of how to
build correct, simple, and scalable data structures has not yet been definitively
settled. In this paper, we revisit this question from a minimalist perspective,
and ask: what is the smallest amount of synchronization required for correct and
efficient concurrent search data structures, and how could this minimal synchronization
support be provided in hardware?\r\n\r\nTo address these questions, we introduce
memory tagging, a simple hardware mechanism which enables the programmer to \"tag\"
a dynamic set of memory locations, at cache-line granularity, and later validate
whether the memory has been concurrently modified, with the possibility of updating
one of the underlying locations atomically if validation succeeds. We provide
several examples showing that this mechanism can enable fast and arguably simple
concurrent data structure designs, such as lists, binary search trees, balanced
search trees, range queries, and Software Transactional Memory (STM) implementations.
We provide an implementation of memory tags in the Graphite multi-core simulator,
showing that the mechanism can be implemented entirely at the level of L1 cache,
and that it can enable non-trivial speedups versus existing implementations of
the above data structures."
article_processing_charge: No
author:
- first_name: Dan-Adrian
full_name: Alistarh, Dan-Adrian
id: 4A899BFC-F248-11E8-B48F-1D18A9856A87
last_name: Alistarh
orcid: 0000-0003-3650-940X
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: Nandini
full_name: Singhal, Nandini
last_name: Singhal
citation:
ama: 'Alistarh D-A, Brown TA, Singhal N. Memory tagging: Minimalist synchronization
for scalable concurrent data structures. In: Annual ACM Symposium on Parallelism
in Algorithms and Architectures. Association for Computing Machinery; 2020:37-49.
doi:10.1145/3350755.3400213'
apa: 'Alistarh, D.-A., Brown, T. A., & Singhal, N. (2020). Memory tagging: Minimalist
synchronization for scalable concurrent data structures. In Annual ACM Symposium
on Parallelism in Algorithms and Architectures (pp. 37–49). Virtual Event,
United States: Association for Computing Machinery. https://doi.org/10.1145/3350755.3400213'
chicago: 'Alistarh, Dan-Adrian, Trevor A Brown, and Nandini Singhal. “Memory Tagging:
Minimalist Synchronization for Scalable Concurrent Data Structures.” In Annual
ACM Symposium on Parallelism in Algorithms and Architectures, 37–49. Association
for Computing Machinery, 2020. https://doi.org/10.1145/3350755.3400213.'
ieee: 'D.-A. Alistarh, T. A. Brown, and N. Singhal, “Memory tagging: Minimalist
synchronization for scalable concurrent data structures,” in Annual ACM Symposium
on Parallelism in Algorithms and Architectures, Virtual Event, United States,
2020, no. 7, pp. 37–49.'
ista: 'Alistarh D-A, Brown TA, Singhal N. 2020. Memory tagging: Minimalist synchronization
for scalable concurrent data structures. Annual ACM Symposium on Parallelism in
Algorithms and Architectures. SPAA: Symposium on Parallelism in Algorithms and
Architectures, 37–49.'
mla: 'Alistarh, Dan-Adrian, et al. “Memory Tagging: Minimalist Synchronization for
Scalable Concurrent Data Structures.” Annual ACM Symposium on Parallelism in
Algorithms and Architectures, no. 7, Association for Computing Machinery,
2020, pp. 37–49, doi:10.1145/3350755.3400213.'
short: D.-A. Alistarh, T.A. Brown, N. Singhal, in:, Annual ACM Symposium on Parallelism
in Algorithms and Architectures, Association for Computing Machinery, 2020, pp.
37–49.
conference:
end_date: 2020-07-17
location: Virtual Event, United States
name: 'SPAA: Symposium on Parallelism in Algorithms and Architectures'
start_date: 2020-07-15
date_created: 2020-08-02T22:00:58Z
date_published: 2020-07-06T00:00:00Z
date_updated: 2024-02-28T12:56:32Z
day: '06'
department:
- _id: DaAl
doi: 10.1145/3350755.3400213
external_id:
isi:
- '000744436200004'
isi: 1
issue: '7'
language:
- iso: eng
month: '07'
oa_version: None
page: 37-49
publication: Annual ACM Symposium on Parallelism in Algorithms and Architectures
publication_identifier:
isbn:
- '9781450369350'
publication_status: published
publisher: Association for Computing Machinery
quality_controlled: '1'
scopus_import: '1'
status: public
title: 'Memory tagging: Minimalist synchronization for scalable concurrent data structures'
type: conference
user_id: 2DF688A6-F248-11E8-B48F-1D18A9856A87
year: '2020'
...
---
_id: '7272'
abstract:
- lang: eng
text: "Many systems rely on optimistic concurrent search trees for multi-core scalability.
In principle, optimistic trees have a simple performance story: searches are read-only
and so run in parallel, with writes to shared memory occurring only when modifying
the data structure. However, this paper shows that in practice, obtaining the
full performance benefits of optimistic search trees is not so simple.\r\n\r\nWe
focus on optimistic binary search trees (BSTs) and perform a detailed performance
analysis of 10 state-of-the-art BSTs on large scale x86-64 hardware, using both
microbenchmarks and an in-memory database system. We find and explain significant
unexpected performance differences between BSTs with similar tree structure and
search implementations, which we trace to subtle performance-degrading interactions
of BSTs with systems software and hardware subsystems. We further derive a prescriptive
approach to avoid this performance degradation, as well as algorithmic insights
on optimistic BST design. Our work underlines the gap between the theory and practice
of multi-core performance, and calls for further research to help bridge this
gap."
article_processing_charge: No
author:
- first_name: Maya
full_name: Arbel-Raviv, Maya
last_name: Arbel-Raviv
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: Adam
full_name: Morrison, Adam
last_name: Morrison
citation:
ama: 'Arbel-Raviv M, Brown TA, Morrison A. Getting to the root of concurrent binary
search tree performance. In: Proceedings of the 2018 USENIX Annual Technical
Conference. USENIX Association; 2020:295-306.'
apa: 'Arbel-Raviv, M., Brown, T. A., & Morrison, A. (2020). Getting to the root
of concurrent binary search tree performance. In Proceedings of the 2018 USENIX
Annual Technical Conference (pp. 295–306). Boston, MA, United States: USENIX
Association.'
chicago: Arbel-Raviv, Maya, Trevor A Brown, and Adam Morrison. “Getting to the Root
of Concurrent Binary Search Tree Performance.” In Proceedings of the 2018 USENIX
Annual Technical Conference, 295–306. USENIX Association, 2020.
ieee: M. Arbel-Raviv, T. A. Brown, and A. Morrison, “Getting to the root of concurrent
binary search tree performance,” in Proceedings of the 2018 USENIX Annual Technical
Conference, Boston, MA, United States, 2020, pp. 295–306.
ista: 'Arbel-Raviv M, Brown TA, Morrison A. 2020. Getting to the root of concurrent
binary search tree performance. Proceedings of the 2018 USENIX Annual Technical
Conference. USENIX: Annual Technical Conference, 295–306.'
mla: Arbel-Raviv, Maya, et al. “Getting to the Root of Concurrent Binary Search
Tree Performance.” Proceedings of the 2018 USENIX Annual Technical Conference,
USENIX Association, 2020, pp. 295–306.
short: M. Arbel-Raviv, T.A. Brown, A. Morrison, in:, Proceedings of the 2018 USENIX
Annual Technical Conference, USENIX Association, 2020, pp. 295–306.
conference:
end_date: 2018-07-13
location: Boston, MA, United States
name: 'USENIX: Annual Technical Conference'
start_date: 2018-07-11
date_created: 2020-01-14T07:27:08Z
date_published: 2020-01-01T00:00:00Z
date_updated: 2021-01-11T15:25:48Z
day: '01'
ddc:
- '000'
department:
- _id: DaAl
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://www.usenix.org/system/files/conference/atc18/atc18-arbel-raviv.pdf
month: '01'
oa: 1
oa_version: Published Version
page: 295-306
project:
- _id: 26450934-B435-11E9-9278-68D0E5697425
name: NSERC Postdoctoral fellowship
publication: Proceedings of the 2018 USENIX Annual Technical Conference
publication_identifier:
isbn:
- '9781939133021'
publication_status: published
publisher: USENIX Association
quality_controlled: '1'
scopus_import: '1'
status: public
title: Getting to the root of concurrent binary search tree performance
type: conference
user_id: 2DF688A6-F248-11E8-B48F-1D18A9856A87
year: '2020'
...
---
_id: '7636'
abstract:
- lang: eng
text: "Balanced search trees typically use key comparisons to guide their operations,
and achieve logarithmic running time. By relying on numerical properties of the
keys, interpolation search achieves lower search complexity and better performance.
Although interpolation-based data structures were investigated in the past, their
non-blocking concurrent variants have received very little attention so far.\r\nIn
this paper, we propose the first non-blocking implementation of the classic interpolation
search tree (IST) data structure. For arbitrary key distributions, the data structure
ensures worst-case O(log n + p) amortized time for search, insertion and deletion
traversals. When the input key distributions are smooth, lookups run in expected
O(log log n + p) time, and insertion and deletion run in expected amortized O(log
log n + p) time, where p is a bound on the number of threads. To improve the scalability
of concurrent insertion and deletion, we propose a novel parallel rebuilding technique,
which should be of independent interest.\r\nWe evaluate whether the theoretical
improvements translate to practice by implementing the concurrent interpolation
search tree, and benchmarking it on uniform and nonuniform key distributions,
for dataset sizes in the millions to billions of keys. Relative to the state-of-the-art
concurrent data structures, the concurrent interpolation search tree achieves
performance improvements of up to 15% under high update rates, and of up to 50%
under moderate update rates. Further, ISTs exhibit up to 2X less cache-misses,
and consume 1.2 -- 2.6X less memory compared to the next best alternative on typical
dataset sizes. We find that the results are surprisingly robust to distributional
skew, which suggests that our data structure can be a promising alternative to
classic concurrent search structures."
acknowledgement: "This project has received funding from the European Research Council
(ERC) under the European Union Horizon 2020 research and innovation program, grant
agreement No 805223, ERC Starting Grant ScaleML. We acknowledge the support of the
Natural Sciences and\r\nEngineering Research Council of Canada (NSERC). "
article_processing_charge: No
author:
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: Aleksandar
full_name: Prokopec, Aleksandar
last_name: Prokopec
- first_name: Dan-Adrian
full_name: Alistarh, Dan-Adrian
id: 4A899BFC-F248-11E8-B48F-1D18A9856A87
last_name: Alistarh
orcid: 0000-0003-3650-940X
citation:
ama: 'Brown TA, Prokopec A, Alistarh D-A. Non-blocking interpolation search trees
with doubly-logarithmic running time. In: Proceedings of the ACM SIGPLAN Symposium
on Principles and Practice of Parallel Programming. Association for Computing
Machinery; 2020:276-291. doi:10.1145/3332466.3374542'
apa: 'Brown, T. A., Prokopec, A., & Alistarh, D.-A. (2020). Non-blocking interpolation
search trees with doubly-logarithmic running time. In Proceedings of the ACM
SIGPLAN Symposium on Principles and Practice of Parallel Programming (pp.
276–291). San Diego, CA, United States: Association for Computing Machinery. https://doi.org/10.1145/3332466.3374542'
chicago: Brown, Trevor A, Aleksandar Prokopec, and Dan-Adrian Alistarh. “Non-Blocking
Interpolation Search Trees with Doubly-Logarithmic Running Time.” In Proceedings
of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming,
276–91. Association for Computing Machinery, 2020. https://doi.org/10.1145/3332466.3374542.
ieee: T. A. Brown, A. Prokopec, and D.-A. Alistarh, “Non-blocking interpolation
search trees with doubly-logarithmic running time,” in Proceedings of the ACM
SIGPLAN Symposium on Principles and Practice of Parallel Programming, San
Diego, CA, United States, 2020, pp. 276–291.
ista: 'Brown TA, Prokopec A, Alistarh D-A. 2020. Non-blocking interpolation search
trees with doubly-logarithmic running time. Proceedings of the ACM SIGPLAN Symposium
on Principles and Practice of Parallel Programming. PPOPP: Principles and Practice
of Parallel Programming, 276–291.'
mla: Brown, Trevor A., et al. “Non-Blocking Interpolation Search Trees with Doubly-Logarithmic
Running Time.” Proceedings of the ACM SIGPLAN Symposium on Principles and Practice
of Parallel Programming, Association for Computing Machinery, 2020, pp. 276–91,
doi:10.1145/3332466.3374542.
short: T.A. Brown, A. Prokopec, D.-A. Alistarh, in:, Proceedings of the ACM SIGPLAN
Symposium on Principles and Practice of Parallel Programming, Association for
Computing Machinery, 2020, pp. 276–291.
conference:
end_date: 2020-02-26
location: San Diego, CA, United States
name: 'PPOPP: Principles and Practice of Parallel Programming'
start_date: 2020-02-22
date_created: 2020-04-05T22:00:49Z
date_published: 2020-02-19T00:00:00Z
date_updated: 2024-02-28T12:55:14Z
day: '19'
department:
- _id: DaAl
doi: 10.1145/3332466.3374542
ec_funded: 1
external_id:
isi:
- '000564476500020'
isi: 1
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://doi.org/10.1145/3332466.3374542
month: '02'
oa: 1
oa_version: Published Version
page: 276-291
project:
- _id: 268A44D6-B435-11E9-9278-68D0E5697425
call_identifier: H2020
grant_number: '805223'
name: Elastic Coordination for Scalable Machine Learning
publication: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of
Parallel Programming
publication_identifier:
isbn:
- '9781450368186'
publication_status: published
publisher: Association for Computing Machinery
quality_controlled: '1'
scopus_import: '1'
status: public
title: Non-blocking interpolation search trees with doubly-logarithmic running time
type: conference
user_id: 2DF688A6-F248-11E8-B48F-1D18A9856A87
year: '2020'
...
---
_id: '85'
abstract:
- lang: eng
text: Concurrent accesses to shared data structures must be synchronized to avoid
data races. Coarse-grained synchronization, which locks the entire data structure,
is easy to implement but does not scale. Fine-grained synchronization can scale
well, but can be hard to reason about. Hand-over-hand locking, in which operations
are pipelined as they traverse the data structure, combines fine-grained synchronization
with ease of use. However, the traditional implementation suffers from inherent
overheads. This paper introduces snapshot-based synchronization (SBS), a novel
hand-over-hand locking mechanism. SBS decouples the synchronization state from
the data, significantly improving cache utilization. Further, it relies on guarantees
provided by pipelining to minimize synchronization that requires cross-thread
communication. Snapshot-based synchronization thus scales much better than traditional
hand-over-hand locking, while maintaining the same ease of use.
acknowledgement: Trevor Brown was supported in part by the ISF (grants 2005/17 & 1749/14)
and by a NSERC post-doctoral fellowship.
alternative_title:
- LNCS
article_processing_charge: No
author:
- first_name: Eran
full_name: Gilad, Eran
last_name: Gilad
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: Mark
full_name: Oskin, Mark
last_name: Oskin
- first_name: Yoav
full_name: Etsion, Yoav
last_name: Etsion
citation:
ama: 'Gilad E, Brown TA, Oskin M, Etsion Y. Snapshot based synchronization: A fast
replacement for Hand-over-Hand locking. In: Vol 11014. Springer; 2018:465-479.
doi:10.1007/978-3-319-96983-1_33'
apa: 'Gilad, E., Brown, T. A., Oskin, M., & Etsion, Y. (2018). Snapshot based
synchronization: A fast replacement for Hand-over-Hand locking (Vol. 11014, pp.
465–479). Presented at the Euro-Par: European Conference on Parallel Processing,
Turin, Italy: Springer. https://doi.org/10.1007/978-3-319-96983-1_33'
chicago: 'Gilad, Eran, Trevor A Brown, Mark Oskin, and Yoav Etsion. “Snapshot Based
Synchronization: A Fast Replacement for Hand-over-Hand Locking,” 11014:465–79.
Springer, 2018. https://doi.org/10.1007/978-3-319-96983-1_33.'
ieee: 'E. Gilad, T. A. Brown, M. Oskin, and Y. Etsion, “Snapshot based synchronization:
A fast replacement for Hand-over-Hand locking,” presented at the Euro-Par: European
Conference on Parallel Processing, Turin, Italy, 2018, vol. 11014, pp. 465–479.'
ista: 'Gilad E, Brown TA, Oskin M, Etsion Y. 2018. Snapshot based synchronization:
A fast replacement for Hand-over-Hand locking. Euro-Par: European Conference on
Parallel Processing, LNCS, vol. 11014, 465–479.'
mla: 'Gilad, Eran, et al. Snapshot Based Synchronization: A Fast Replacement
for Hand-over-Hand Locking. Vol. 11014, Springer, 2018, pp. 465–79, doi:10.1007/978-3-319-96983-1_33.'
short: E. Gilad, T.A. Brown, M. Oskin, Y. Etsion, in:, Springer, 2018, pp. 465–479.
conference:
end_date: 2018-08-31
location: Turin, Italy
name: 'Euro-Par: European Conference on Parallel Processing'
start_date: 2018-08-27
date_created: 2018-12-11T11:44:33Z
date_published: 2018-08-01T00:00:00Z
date_updated: 2023-09-18T09:32:36Z
day: '01'
ddc:
- '000'
department:
- _id: DaAl
doi: 10.1007/978-3-319-96983-1_33
external_id:
isi:
- '000851042300031'
file:
- access_level: open_access
checksum: 13a3f250be8878405e791b53c19722ad
content_type: application/pdf
creator: dernst
date_created: 2019-02-12T07:40:40Z
date_updated: 2020-07-14T12:48:14Z
file_id: '5954'
file_name: 2018_Brown.pdf
file_size: 665372
relation: main_file
file_date_updated: 2020-07-14T12:48:14Z
has_accepted_license: '1'
intvolume: ' 11014'
isi: 1
language:
- iso: eng
month: '08'
oa: 1
oa_version: Preprint
page: 465 - 479
project:
- _id: 26450934-B435-11E9-9278-68D0E5697425
name: NSERC Postdoctoral fellowship
publication_identifier:
issn:
- '03029743'
publication_status: published
publisher: Springer
publist_id: '7969'
quality_controlled: '1'
scopus_import: '1'
status: public
title: 'Snapshot based synchronization: A fast replacement for Hand-over-Hand locking'
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 11014
year: '2018'
...
---
_id: '5963'
abstract:
- lang: eng
text: 'There has been significant progress in understanding the parallelism inherent
to iterative sequential algorithms: for many classic algorithms, the depth of
the dependence structure is now well understood, and scheduling techniques have
been developed to exploit this shallow dependence structure for efficient parallel
implementations. A related, applied research strand has studied methods by which
certain iterative task-based algorithms can be efficiently parallelized via relaxed
concurrent priority schedulers. These allow for high concurrency when inserting
and removing tasks, at the cost of executing superfluous work due to the relaxed
semantics of the scheduler. In this work, we take a step towards unifying these
two research directions, by showing that there exists a family of relaxed priority
schedulers that can efficiently and deterministically execute classic iterative
algorithms such as greedy maximal independent set (MIS) and matching. Our primary
result shows that, given a randomized scheduler with an expected relaxation factor
of k in terms of the maximum allowed priority inversions on a task, and any graph
on n vertices, the scheduler is able to execute greedy MIS with only an additive
factor of \poly(k) expected additional iterations compared to an exact (but not
scalable) scheduler. This counter-intuitive result demonstrates that the overhead
of relaxation when computing MIS is not dependent on the input size or structure
of the input graph. Experimental results show that this overhead can be clearly
offset by the gain in performance due to the highly scalable scheduler. In sum,
we present an efficient method to deterministically parallelize iterative sequential
algorithms, with provable runtime guarantees in terms of the number of executed
tasks to completion.'
article_processing_charge: No
arxiv: 1
author:
- first_name: Dan-Adrian
full_name: Alistarh, Dan-Adrian
id: 4A899BFC-F248-11E8-B48F-1D18A9856A87
last_name: Alistarh
orcid: 0000-0003-3650-940X
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: Justin
full_name: Kopinsky, Justin
last_name: Kopinsky
- first_name: Giorgi
full_name: Nadiradze, Giorgi
last_name: Nadiradze
citation:
ama: 'Alistarh D-A, Brown TA, Kopinsky J, Nadiradze G. Relaxed schedulers can efficiently
parallelize iterative algorithms. In: Proceedings of the 2018 ACM Symposium
on Principles of Distributed Computing - PODC ’18. ACM Press; 2018:377-386.
doi:10.1145/3212734.3212756'
apa: 'Alistarh, D.-A., Brown, T. A., Kopinsky, J., & Nadiradze, G. (2018). Relaxed
schedulers can efficiently parallelize iterative algorithms. In Proceedings
of the 2018 ACM Symposium on Principles of Distributed Computing - PODC ’18
(pp. 377–386). Egham, United Kingdom: ACM Press. https://doi.org/10.1145/3212734.3212756'
chicago: Alistarh, Dan-Adrian, Trevor A Brown, Justin Kopinsky, and Giorgi Nadiradze.
“Relaxed Schedulers Can Efficiently Parallelize Iterative Algorithms.” In Proceedings
of the 2018 ACM Symposium on Principles of Distributed Computing - PODC ’18,
377–86. ACM Press, 2018. https://doi.org/10.1145/3212734.3212756.
ieee: D.-A. Alistarh, T. A. Brown, J. Kopinsky, and G. Nadiradze, “Relaxed schedulers
can efficiently parallelize iterative algorithms,” in Proceedings of the 2018
ACM Symposium on Principles of Distributed Computing - PODC ’18, Egham, United
Kingdom, 2018, pp. 377–386.
ista: 'Alistarh D-A, Brown TA, Kopinsky J, Nadiradze G. 2018. Relaxed schedulers
can efficiently parallelize iterative algorithms. Proceedings of the 2018 ACM
Symposium on Principles of Distributed Computing - PODC ’18. PODC: Principles
of Distributed Computing, 377–386.'
mla: Alistarh, Dan-Adrian, et al. “Relaxed Schedulers Can Efficiently Parallelize
Iterative Algorithms.” Proceedings of the 2018 ACM Symposium on Principles
of Distributed Computing - PODC ’18, ACM Press, 2018, pp. 377–86, doi:10.1145/3212734.3212756.
short: D.-A. Alistarh, T.A. Brown, J. Kopinsky, G. Nadiradze, in:, Proceedings of
the 2018 ACM Symposium on Principles of Distributed Computing - PODC ’18, ACM
Press, 2018, pp. 377–386.
conference:
end_date: 2018-07-27
location: Egham, United Kingdom
name: 'PODC: Principles of Distributed Computing'
start_date: 2018-07-23
date_created: 2019-02-13T10:03:25Z
date_published: 2018-07-23T00:00:00Z
date_updated: 2023-09-19T10:43:21Z
day: '23'
department:
- _id: DaAl
doi: 10.1145/3212734.3212756
external_id:
arxiv:
- '1808.04155'
isi:
- '000458186900048'
isi: 1
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://arxiv.org/abs/1808.04155
month: '07'
oa: 1
oa_version: Preprint
page: 377-386
publication: Proceedings of the 2018 ACM Symposium on Principles of Distributed Computing -
PODC '18
publication_identifier:
isbn:
- '9781450357951'
publication_status: published
publisher: ACM Press
quality_controlled: '1'
scopus_import: '1'
status: public
title: Relaxed schedulers can efficiently parallelize iterative algorithms
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
year: '2018'
...
---
_id: '5965'
abstract:
- lang: eng
text: Relaxed concurrent data structures have become increasingly popular, due to
their scalability in graph processing and machine learning applications (\citeNguyen13,
gonzalez2012powergraph ). Despite considerable interest, there exist families
of natural, high performing randomized relaxed concurrent data structures, such
as the popular MultiQueue~\citeMQ pattern for implementing relaxed priority queue
data structures, for which no guarantees are known in the concurrent setting~\citeAKLN17.
Our main contribution is in showing for the first time that, under a set of analytic
assumptions, a family of relaxed concurrent data structures, including variants
of MultiQueues, but also a new approximate counting algorithm we call the MultiCounter,
provides strong probabilistic guarantees on the degree of relaxation with respect
to the sequential specification, in arbitrary concurrent executions. We formalize
these guarantees via a new correctness condition called distributional linearizability,
tailored to concurrent implementations with randomized relaxations. Our result
is based on a new analysis of an asynchronous variant of the classic power-of-two-choices
load balancing algorithm, in which placement choices can be based on inconsistent,
outdated information (this result may be of independent interest). We validate
our results empirically, showing that the MultiCounter algorithm can implement
scalable relaxed timestamps.
article_processing_charge: No
arxiv: 1
author:
- first_name: Dan-Adrian
full_name: Alistarh, Dan-Adrian
id: 4A899BFC-F248-11E8-B48F-1D18A9856A87
last_name: Alistarh
orcid: 0000-0003-3650-940X
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
- first_name: Justin
full_name: Kopinsky, Justin
last_name: Kopinsky
- first_name: Jerry Z.
full_name: Li, Jerry Z.
last_name: Li
- first_name: Giorgi
full_name: Nadiradze, Giorgi
last_name: Nadiradze
citation:
ama: 'Alistarh D-A, Brown TA, Kopinsky J, Li JZ, Nadiradze G. Distributionally linearizable
data structures. In: Proceedings of the 30th on Symposium on Parallelism in
Algorithms and Architectures - SPAA ’18. ACM Press; 2018:133-142. doi:10.1145/3210377.3210411'
apa: 'Alistarh, D.-A., Brown, T. A., Kopinsky, J., Li, J. Z., & Nadiradze, G.
(2018). Distributionally linearizable data structures. In Proceedings of the
30th on Symposium on Parallelism in Algorithms and Architectures - SPAA ’18
(pp. 133–142). Vienna, Austria: ACM Press. https://doi.org/10.1145/3210377.3210411'
chicago: Alistarh, Dan-Adrian, Trevor A Brown, Justin Kopinsky, Jerry Z. Li, and
Giorgi Nadiradze. “Distributionally Linearizable Data Structures.” In Proceedings
of the 30th on Symposium on Parallelism in Algorithms and Architectures - SPAA
’18, 133–42. ACM Press, 2018. https://doi.org/10.1145/3210377.3210411.
ieee: D.-A. Alistarh, T. A. Brown, J. Kopinsky, J. Z. Li, and G. Nadiradze, “Distributionally
linearizable data structures,” in Proceedings of the 30th on Symposium on Parallelism
in Algorithms and Architectures - SPAA ’18, Vienna, Austria, 2018, pp. 133–142.
ista: 'Alistarh D-A, Brown TA, Kopinsky J, Li JZ, Nadiradze G. 2018. Distributionally
linearizable data structures. Proceedings of the 30th on Symposium on Parallelism
in Algorithms and Architectures - SPAA ’18. SPAA: Symposium on Parallelism in
Algorithms and Architectures, 133–142.'
mla: Alistarh, Dan-Adrian, et al. “Distributionally Linearizable Data Structures.”
Proceedings of the 30th on Symposium on Parallelism in Algorithms and Architectures
- SPAA ’18, ACM Press, 2018, pp. 133–42, doi:10.1145/3210377.3210411.
short: D.-A. Alistarh, T.A. Brown, J. Kopinsky, J.Z. Li, G. Nadiradze, in:, Proceedings
of the 30th on Symposium on Parallelism in Algorithms and Architectures - SPAA
’18, ACM Press, 2018, pp. 133–142.
conference:
end_date: 2018-07-18
location: Vienna, Austria
name: 'SPAA: Symposium on Parallelism in Algorithms and Architectures'
start_date: 2018-07-16
date_created: 2019-02-13T10:17:19Z
date_published: 2018-07-16T00:00:00Z
date_updated: 2023-09-19T10:44:13Z
day: '16'
department:
- _id: DaAl
doi: 10.1145/3210377.3210411
external_id:
arxiv:
- '1804.01018'
isi:
- '000545269600016'
isi: 1
language:
- iso: eng
main_file_link:
- open_access: '1'
url: https://arxiv.org/abs/1804.01018
month: '07'
oa: 1
oa_version: Preprint
page: 133-142
publication: Proceedings of the 30th on Symposium on Parallelism in Algorithms and
Architectures - SPAA '18
publication_identifier:
isbn:
- '9781450357999'
publication_status: published
publisher: ACM Press
quality_controlled: '1'
related_material:
record:
- id: '10429'
relation: dissertation_contains
status: public
scopus_import: '1'
status: public
title: Distributionally linearizable data structures
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
year: '2018'
...
---
_id: '397'
abstract:
- lang: eng
text: 'Concurrent sets with range query operations are highly desirable in applications
such as in-memory databases. However, few set implementations offer range queries.
Known techniques for augmenting data structures with range queries (or operations
that can be used to build range queries) have numerous problems that limit their
usefulness. For example, they impose high overhead or rely heavily on garbage
collection. In this work, we show how to augment data structures with highly efficient
range queries, without relying on garbage collection. We identify a property of
epoch-based memory reclamation algorithms that makes them ideal for implementing
range queries, and produce three algorithms, which use locks, transactional memory
and lock-free techniques, respectively. Our algorithms are applicable to more
data structures than previous work, and are shown to be highly efficient on a
large scale Intel system. '
alternative_title:
- PPoPP
article_processing_charge: No
author:
- first_name: Maya
full_name: Arbel Raviv, Maya
last_name: Arbel Raviv
- first_name: Trevor A
full_name: Brown, Trevor A
id: 3569F0A0-F248-11E8-B48F-1D18A9856A87
last_name: Brown
citation:
ama: 'Arbel Raviv M, Brown TA. Harnessing epoch-based reclamation for efficient
range queries. In: Vol 53. ACM; 2018:14-27. doi:10.1145/3178487.3178489'
apa: 'Arbel Raviv, M., & Brown, T. A. (2018). Harnessing epoch-based reclamation
for efficient range queries (Vol. 53, pp. 14–27). Presented at the PPoPP: Principles
and Practice of Parallel Programming, Vienna, Austria: ACM. https://doi.org/10.1145/3178487.3178489'
chicago: Arbel Raviv, Maya, and Trevor A Brown. “Harnessing Epoch-Based Reclamation
for Efficient Range Queries,” 53:14–27. ACM, 2018. https://doi.org/10.1145/3178487.3178489.
ieee: 'M. Arbel Raviv and T. A. Brown, “Harnessing epoch-based reclamation for efficient
range queries,” presented at the PPoPP: Principles and Practice of Parallel Programming,
Vienna, Austria, 2018, vol. 53, no. 1, pp. 14–27.'
ista: 'Arbel Raviv M, Brown TA. 2018. Harnessing epoch-based reclamation for efficient
range queries. PPoPP: Principles and Practice of Parallel Programming, PPoPP,
vol. 53, 14–27.'
mla: Arbel Raviv, Maya, and Trevor A. Brown. Harnessing Epoch-Based Reclamation
for Efficient Range Queries. Vol. 53, no. 1, ACM, 2018, pp. 14–27, doi:10.1145/3178487.3178489.
short: M. Arbel Raviv, T.A. Brown, in:, ACM, 2018, pp. 14–27.
conference:
end_date: 2018-02-28
location: Vienna, Austria
name: 'PPoPP: Principles and Practice of Parallel Programming'
start_date: 2018-02-24
date_created: 2018-12-11T11:46:14Z
date_published: 2018-02-10T00:00:00Z
date_updated: 2023-09-11T14:10:25Z
day: '10'
department:
- _id: DaAl
doi: 10.1145/3178487.3178489
external_id:
isi:
- '000446161100002'
intvolume: ' 53'
isi: 1
issue: '1'
language:
- iso: eng
month: '02'
oa_version: None
page: 14 - 27
publication_identifier:
isbn:
- 978-1-4503-4982-6
publication_status: published
publisher: ACM
publist_id: '7430'
quality_controlled: '1'
scopus_import: '1'
status: public
title: Harnessing epoch-based reclamation for efficient range queries
type: conference
user_id: c635000d-4b10-11ee-a964-aac5a93f6ac1
volume: 53
year: '2018'
...