Synthesizing time triggered schedules for switched networks with faulty links
Avni G, Guha S, Rodríguez Navas G. 2016. Synthesizing time triggered schedules for switched networks with faulty links. Proceedings of the 13th International Conference on Embedded Software . EMSOFT: Embedded Software , 26.
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Author
Avni, GuyISTA ;
Guha, Shibashis;
Rodríguez Navas, Guillermo
Department
Abstract
Time-triggered (TT) switched networks are a deterministic communication infrastructure used by real-time distributed embedded systems. These networks rely on the notion of globally discretized time (i.e. time slots) and a static TT schedule that prescribes which message is sent through which link at every time slot, such that all messages reach their destination before a global timeout. These schedules are generated offline, assuming a static network with fault-free links, and entrusting all error-handling functions to the end user. Assuming the network is static is an over-optimistic view, and indeed links tend to fail in practice. We study synthesis of TT schedules on a network in which links fail over time and we assume the switches run a very simple error-recovery protocol once they detect a crashed link. We address the problem of finding a pk; qresistant schedule; namely, one that, assuming the switches run a fixed error-recovery protocol, guarantees that the number of messages that arrive at their destination by the timeout is at least no matter what sequence of at most k links fail. Thus, we maintain the simplicity of the switches while giving a guarantee on the number of messages that meet the timeout. We show how a pk; q-resistant schedule can be obtained using a CEGAR-like approach: find a schedule, decide whether it is pk; q-resistant, and if it is not, use the witnessing fault sequence to generate a constraint that is added to the program. The newly added constraint disallows the schedule to be regenerated in a future iteration while also eliminating several other schedules that are not pk; q-resistant. We illustrate the applicability of our approach using an SMT-based implementation. © 2016 ACM.
Publishing Year
Date Published
2016-10-01
Proceedings Title
Proceedings of the 13th International Conference on Embedded Software
Publisher
ACM
Article Number
26
Conference
EMSOFT: Embedded Software
Conference Location
Pittsburgh, PA, USA
Conference Date
2016-10-01 – 2016-10-07
IST-REx-ID
Cite this
Avni G, Guha S, Rodríguez Navas G. Synthesizing time triggered schedules for switched networks with faulty links. In: Proceedings of the 13th International Conference on Embedded Software . ACM; 2016. doi:10.1145/2968478.2968499
Avni, G., Guha, S., & Rodríguez Navas, G. (2016). Synthesizing time triggered schedules for switched networks with faulty links. In Proceedings of the 13th International Conference on Embedded Software . Pittsburgh, PA, USA: ACM. https://doi.org/10.1145/2968478.2968499
Avni, Guy, Shibashis Guha, and Guillermo Rodríguez Navas. “Synthesizing Time Triggered Schedules for Switched Networks with Faulty Links.” In Proceedings of the 13th International Conference on Embedded Software . ACM, 2016. https://doi.org/10.1145/2968478.2968499.
G. Avni, S. Guha, and G. Rodríguez Navas, “Synthesizing time triggered schedules for switched networks with faulty links,” in Proceedings of the 13th International Conference on Embedded Software , Pittsburgh, PA, USA, 2016.
Avni G, Guha S, Rodríguez Navas G. 2016. Synthesizing time triggered schedules for switched networks with faulty links. Proceedings of the 13th International Conference on Embedded Software . EMSOFT: Embedded Software , 26.
Avni, Guy, et al. “Synthesizing Time Triggered Schedules for Switched Networks with Faulty Links.” Proceedings of the 13th International Conference on Embedded Software , 26, ACM, 2016, doi:10.1145/2968478.2968499.
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