Symbolic time and space tradeoffs for probabilistic verification
Chatterjee K, Dvorak W, Henzinger MH, Svozil A. 2021. Symbolic time and space tradeoffs for probabilistic verification. Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science. LICS: Symposium on Logic in Computer Science, 1–13.
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https://arxiv.org/abs/2104.07466
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Abstract
We present a faster symbolic algorithm for the following central problem in probabilistic verification: Compute the maximal end-component (MEC) decomposition of Markov decision processes (MDPs). This problem generalizes the SCC decomposition problem of graphs and closed recurrent sets of Markov chains. The model of symbolic algorithms is widely used in formal verification and model-checking, where access to the input model is restricted to only symbolic operations (e.g., basic set operations and computation of one-step neighborhood). For an input MDP with n vertices and m edges, the classical symbolic algorithm from the 1990s for the MEC decomposition requires O(n2) symbolic operations and O(1) symbolic space. The only other symbolic algorithm for the MEC decomposition requires O(nm−−√) symbolic operations and O(m−−√) symbolic space. A main open question is whether the worst-case O(n2) bound for symbolic operations can be beaten. We present a symbolic algorithm that requires O˜(n1.5) symbolic operations and O˜(n−−√) symbolic space. Moreover, the parametrization of our algorithm provides a trade-off between symbolic operations and symbolic space: for all 0<ϵ≤1/2 the symbolic algorithm requires O˜(n2−ϵ) symbolic operations and O˜(nϵ) symbolic space ( O˜ hides poly-logarithmic factors). Using our techniques we present faster algorithms for computing the almost-sure winning regions of ω -regular objectives for MDPs. We consider the canonical parity objectives for ω -regular objectives, and for parity objectives with d -priorities we present an algorithm that computes the almost-sure winning region with O˜(n2−ϵ) symbolic operations and O˜(nϵ) symbolic space, for all 0<ϵ≤1/2 .
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Date Published
2021-07-07
Proceedings Title
Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science
Publisher
Institute of Electrical and Electronics Engineers
Acknowledgement
The authors are grateful to the anonymous referees for their valuable comments. A. S. is fully supported by the Vienna Science and Technology Fund (WWTF) through project ICT15–003. K. C. is supported by the Austrian Science Fund (FWF) NFN Grant No S11407-N23 (RiSE/SHiNE) and by the ERC CoG 863818 (ForM-SMArt). For M. H. the research leading to these results has received funding from the European Research Council under the European Unions Seventh Framework Programme (FP/2007–2013) / ERC Grant Agreement no. 340506.
Page
1-13
Conference
LICS: Symposium on Logic in Computer Science
Conference Location
Rome, Italy
Conference Date
2021-06-29 – 2021-07-02
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ISSN
IST-REx-ID
Cite this
Chatterjee K, Dvorak W, Henzinger MH, Svozil A. Symbolic time and space tradeoffs for probabilistic verification. In: Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science. Institute of Electrical and Electronics Engineers; 2021:1-13. doi:10.1109/LICS52264.2021.9470739
Chatterjee, K., Dvorak, W., Henzinger, M. H., & Svozil, A. (2021). Symbolic time and space tradeoffs for probabilistic verification. In Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science (pp. 1–13). Rome, Italy: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/LICS52264.2021.9470739
Chatterjee, Krishnendu, Wolfgang Dvorak, Monika H Henzinger, and Alexander Svozil. “Symbolic Time and Space Tradeoffs for Probabilistic Verification.” In Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science, 1–13. Institute of Electrical and Electronics Engineers, 2021. https://doi.org/10.1109/LICS52264.2021.9470739.
K. Chatterjee, W. Dvorak, M. H. Henzinger, and A. Svozil, “Symbolic time and space tradeoffs for probabilistic verification,” in Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science, Rome, Italy, 2021, pp. 1–13.
Chatterjee K, Dvorak W, Henzinger MH, Svozil A. 2021. Symbolic time and space tradeoffs for probabilistic verification. Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science. LICS: Symposium on Logic in Computer Science, 1–13.
Chatterjee, Krishnendu, et al. “Symbolic Time and Space Tradeoffs for Probabilistic Verification.” Proceedings of the 36th Annual ACM/IEEE Symposium on Logic in Computer Science, Institute of Electrical and Electronics Engineers, 2021, pp. 1–13, doi:10.1109/LICS52264.2021.9470739.
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arXiv 2104.07466